Enhanced lateral cavity etch

Abstract

A cavity is formed in a semiconductor substrate wherein the width of the cavity is greater than the depth of the cavity and wherein the depth of the cavity is non uniform across the width of the cavity. The cavity may be formed under an electronic device in the semiconductor substrate. The cavity is formed in the substrate by performing a first cavity etch followed by repeated cycles of polymer deposition, cavity etch, and polymer removal.

What is claimed is: 
     
         1 . A semiconductor device comprising a cavity in a substrate wherein the cavity is wider than it is deep and wherein a depth of the cavity is non-uniform across a width of the cavity. 
     
     
         2 . The semiconductor device of  claim 1 , wherein the substrate is single crystal silicon. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the substrate is single crystal silicon germanium. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the cavity underlies an opening in an overlying masking layer. 
     
     
         5 . The semiconductor device of  claim 4 , wherein the masking layer comprises a layer of silicon nitride overlying a layer of silicon dioxide. 
     
     
         6 . The semiconductor device of  claim 1 , wherein the cavity is under an inductor. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the cavity is under a bolometer. 
     
     
         8 . The semiconductor device of  claim 1 , wherein the cavity is under an electronic device that is sensitive to capacitive coupling to the substrate. 
     
     
         9 . A semiconductor device comprising:
 a silicon substrate without an etch stop layer within the silicon substrate;   a cavity in the silicon substrate wherein the cavity is at least twice as wide as it is deep.   
     
     
         10 . The semiconductor device of  claim 9 , wherein the silicon substrate is single crystal silicon. 
     
     
         11 . The semiconductor device of  claim 9 , wherein the silicon substrate is single crystal silicon germanium. 
     
     
         12 . The semiconductor device of  claim 9 , wherein the cavity is under an inductor. 
     
     
         13 . The semiconductor device of  claim 9 , wherein the cavity is under a bolometer. 
     
     
         14 . The semiconductor device of  claim 9 , wherein the cavity is under an electronic device that is sensitive to capacitive coupling to the substrate. 
     
     
         15 . A semiconductor device comprising:
 a substrate of single crystal silicon;   a cavity in the substrate wherein the cavity is at least twice as wide as it is deep, wherein single crystal silicon forms a bottom surface and side surfaces of the cavity and wherein a depth of the cavity is non-uniform across a width of the cavity.   
     
     
         16 . The semiconductor device of  claim 15 , wherein the cavity is under an inductor. 
     
     
         17 . The semiconductor device of  claim 15 , wherein the cavity is under a bolometer. 
     
     
         18 . The semiconductor device of  claim 15 , wherein the cavity is under an electronic device that is sensitive to capacitive coupling to the substrate.