Integrated Circuit Implementing Scalable Meta-Data Objects

Abstract

A method is disclosed for defining an integrated circuit. The method includes generating a digital data file that includes both electrical connection information and physical topology information for a number of circuit components. The method also includes operating a computer to execute a layout generation program. The layout generation program reads the electrical connection and physical topology information for each of the number of circuit components from the digital data file and automatically creates one or more layout structures necessary to form each of the number of circuit components in a semiconductor device fabrication process, such that the one or more layout structures comply with the physical topology information read from the digital data file. The computer is also operated to store the one or more layout structures necessary to form each of the number of circuit components in a digital format on a computer readable medium.

What is claimed is: 
     
         1 . An integrated circuit, comprising:
 a first diffusion region having a size measured in a first direction in units of a first interconnect level pitch, the first diffusion region having a size measured in a second direction in units of one-quarter of a gate electrode pitch;   a second diffusion region having a size measured in the first direction in units of the first interconnect level pitch, the second diffusion region having a size measured in the second direction in units of one-quarter of the gate electrode pitch;   a gate electrode structure having a linear shape and a lengthwise centerline oriented in the first direction and positioned in accordance with the gate electrode pitch, the gate electrode structure positioned between the first diffusion region and the second diffusion region, the gate electrode structure having a length measured in the first direction in units of one-half of the first interconnect level pitch, the gate electrode structure having a width measured in the second direction to extend from the first diffusion region to the second diffusion region;   a local interconnect structure formed to physically contact the first diffusion region, the local interconnect structure having a size measured in the first direction that is at least as large as the first interconnect level pitch, the local interconnect structure having a size measured in the second direction in units of one-quarter of the gate electrode pitch;   a first interconnect level structure having a linear shape and a lengthwise centerline oriented in the second direction and positioned in accordance with the first interconnect level pitch; and   a contact structure extending between the local interconnect structure and the first interconnect level structure, the contact structure physically contacting both the local interconnect structure and the first interconnect level structure, the contact structure positioned in accordance with one-half of the gate electrode pitch.