US2017170281A1PendingUtilityA1

Method for manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device

Assignee: SUMITOMO ELECTRIC INDUSTRIESPriority: Apr 16, 2013Filed: Feb 28, 2017Published: Jun 15, 2017
Est. expiryApr 16, 2033(~6.7 yrs left)· nominal 20-yr term from priority
H10P 76/204H10P 50/692H10P 50/283H10P 50/242H10P 50/73H10P 50/00H10P 14/6322H10P 14/6309H10P 14/6308H10P 14/61H10D 64/01366H10D 30/0297H10D 12/038H01L 21/0273H01L 21/02255H01L 21/31111H01L 29/66068H01L 29/1608H01L 21/049H01L 29/4236H01L 21/02236H01L 29/1029H01L 21/3065H01L 21/0475H01L 29/7827H01L 21/31144H01L 29/0847H10D 62/405H10D 64/516H10D 64/513H10D 62/221H10D 62/151H10D 30/668H10D 30/63H10D 12/481H10D 12/031H10D 62/8325
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Claims

Abstract

A silicon carbide substrate has first to third semiconductor layers. The first and third semiconductor layers have a first conductivity type, and the second semiconductor layer has a second conductivity type. A trench has a bottom surface and first to third side surfaces, the bottom surface being constituted of the first semiconductor layer, the first to third side surfaces being respectively constituted of the first to third semiconductor layers. A gate insulating film having a bottom portion and a side wall portion is provided on the trench. The bottom portion has a minimum thickness d 0 . A portion of the side wall portion on the second side surface has a minimum thickness d 1 . A portion, connected to the bottom portion, of the side wall portion on the first side surface has a thickness d 2 . Moreover, d 2 >d 1 and d 2 >d 0 are satisfied.

Claims

exact text as granted — not AI-modified
1 .- 8 . (canceled) 
     
     
         9 . A silicon carbide semiconductor device comprising:
 a silicon carbide substrate including a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer, said first semiconductor layer having a first conductivity type, said second semiconductor layer being provided on said first semiconductor layer, said second semiconductor layer having a second conductivity type, said third semiconductor layer being provided on said second semiconductor layer, said third semiconductor layer being separated from said first semiconductor layer by said second semiconductor layer, said third semiconductor layer having said first conductivity type, said silicon carbide substrate being provided with a trench, said trench including a bottom surface and a side wall surface, said bottom surface being constituted of said first semiconductor layer, said side wall surface having first to third side surfaces respectively constituted of said first to third semiconductor layers;   a gate insulating film provided on said trench, said gate insulating film having a bottom portion and a side wall portion, said bottom portion covering said bottom surface, said side wall portion being connected to said bottom portion, said side wall portion covering said side wall surface, said bottom portion having a minimum thickness d 0 , a portion of said side wall portion on said second side surface having a minimum thickness d 1 , said side wall portion having a portion that is connected to said bottom portion on said first side surface and that has a thickness d 2 , d 2 >d 1  and d 2 >d 0  being satisfied; and   a gate electrode provided on said trench with said gate insulating film being interposed therebetween.   
     
     
         10 . The silicon carbide semiconductor device according to  claim 9 , wherein d 0 >d 1  is satisfied. 
     
     
         11 . The silicon carbide semiconductor device according to  claim 9 , wherein said side wall portion of said gate insulating film connects said first and third semiconductor layers to each other on said second side surface by a portion having a thickness less than thickness d 2 . 
     
     
         12 . The silicon carbide semiconductor device according to  claim 9 , wherein said side wall portion of said gate insulating film connects said first and third semiconductor layers to each other on said second side surface by the portion having thickness d 1 . 
     
     
         13 . The silicon carbide semiconductor device according to  claim 9 , wherein said side wall portion of said gate insulating film connects between said second semiconductor layer and said bottom portion on said first side surface by a portion having a thickness more than thickness d 1 . 
     
     
         14 . The silicon carbide semiconductor device according to  claim 9 , wherein said side wall portion of said gate insulating film connects between said second semiconductor layer and said bottom portion on said first side surface by the portion having thickness d 2 .

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