US2017162608A1PendingUtilityA1
Liquid crystal display device, el display device, and manufacturing method thereof
Est. expiryNov 11, 2031(~5.3 yrs left)· nominal 20-yr term from priority
H10D 84/01G02F 1/1362G02F 2201/123G02F 1/136227G02F 1/133345G02F 1/1368G02F 1/136286H01L 27/1288G02F 2001/136295H01L 27/1259H01L 27/127H01L 27/1225H01L 27/1255G02F 2001/13629H10D 86/421H10D 86/481H10D 86/441H10D 86/423H10D 86/0231H10D 86/0221H10D 86/60H10D 86/021H10D 86/00G02F 1/13629G02F 1/136295
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Claims
Abstract
A display device is manufactured with five photolithography steps: a step of forming a gate electrode, a step of forming a protective layer for reducing damage due to an etching step or the like, a step of forming a source electrode and a drain electrode, a step of forming a contact hole, and a step of forming a pixel electrode. The display device includes a groove portion which is formed in the step of forming the contact hole and separates the semiconductor layer.
Claims
exact text as granted — not AI-modified1 . (canceled)
2 . A semiconductor device comprising:
a semiconductor layer; an insulating layer over a top surface of the semiconductor layer; and an electrode over the insulating layer, wherein the electrode is in direct contact with a side surface of the semiconductor layer via an opening portion in the insulating layer.
3 . A display device comprising the semiconductor device according to claim 2 , the display device further comprising:
a first wiring; the semiconductor layer over the first wiring with a first insulating layer interposed therebetween; a second insulating layer over and in direct contact with the semiconductor layer, wherein the second insulating layer is the insulating layer; a second wiring over the second insulating layer, the second wiring electrically connected to the semiconductor layer through an opening formed in the second insulating layer; a capacitor wiring; a third insulating layer over the second wiring; and a pixel electrode electrically connected to the semiconductor layer, wherein a part of the first wiring is a gate electrode, wherein a part of the second insulating layer overlaps with a channel region of the semiconductor layer, wherein the semiconductor layer includes an oxide semiconductor containing indium and zinc, wherein the second insulating layer contains oxygen, indium and zinc, wherein the second insulating layer and the semiconductor layer overlap with the first wiring, the second wiring, and the pixel electrode, wherein a first groove is formed at least in the first insulating layer, the second insulating layer, the third insulating layer, and the semiconductor layer to cross the first wiring, wherein a second groove is formed at least in the first insulating layer, the second insulating layer, the third insulating layer, and the semiconductor layer between the pixel electrode and the first wiring, wherein a first part of the first groove overlaps first edges of the first wiring, wherein a second part of the first groove overlaps second edges of the first wiring, wherein a third part of the first groove overlaps third edges of the capacitor wiring, wherein a fourth part of the first groove overlaps fourth edges of the first wiring, wherein a fifth part of the second groove is between the channel region of the semiconductor layer and the pixel electrode, wherein the first part, the fourth part and the second part are aligned in a first direction, wherein the first part and the third part are aligned in a second direction that is perpendicular to the first direction, wherein the fourth part, the channel region of the semiconductor layer and the fifth part are aligned in the second direction, and wherein the first groove and the second groove are separated.
4 . The display device according to claim 3 ,
wherein the first insulating layer is in direct contact with the semiconductor layer, and wherein the first insulating layer contains indium, zinc and oxygen.
5 . The display device according to claim 4 ,
wherein the oxide semiconductor contains gallium, and wherein the first insulating layer contains cerium.
6 . The display device according to claim 4 ,
wherein the oxide semiconductor contains gallium, and wherein the first insulating layer contains yttrium.
7 . A semiconductor device comprising:
a first insulating layer, a semiconductor layer over the first insulating layer; a second insulating layer over a top surface of the semiconductor layer; and an electrode over the second insulating layer, wherein the electrode is in direct contact with the first insulating layer via a first opening portion of the second insulating layer and a second opening portion of the semiconductor layer, and wherein the electrode is in direct contact with a side surface of the semiconductor layer in the second opening portion of the semiconductor layer.
8 . A display device comprising the semiconductor device according to claim 7 , the display device further comprising:
a first wiring; the semiconductor layer over the first wiring with the first insulating layer interposed therebetween; the second insulating layer over and in direct contact with the semiconductor layer; a second wiring over the second insulating layer, the second wiring electrically connected to the semiconductor layer through a third opening formed in the second insulating layer; a capacitor wiring; a third insulating layer over the second wiring; and a pixel electrode electrically connected to the semiconductor layer, wherein a part of the first wiring is a gate electrode, wherein a part of the second insulating layer overlaps with a channel region of the semiconductor layer, wherein the semiconductor layer includes an oxide semiconductor containing indium and zinc, wherein the second insulating layer contains oxygen, indium and zinc, wherein the second insulating layer and the semiconductor layer overlap with the first wiring, the second wiring, and the pixel electrode, wherein a first groove is formed at least in the first insulating layer, the second insulating layer, the third insulating layer, and the semiconductor layer to cross the first wiring, wherein a second groove is formed at least in the first insulating layer, the second insulating layer, the third insulating layer, and the semiconductor layer between the pixel electrode and the first wiring, wherein a first part of the first groove overlaps first edges of the first wiring, wherein a second part of the first groove overlaps second edges of the first wiring, wherein a third part of the first groove overlaps third edges of the capacitor wiring, wherein a fourth part of the first groove overlaps fourth edges of the first wiring, wherein a fifth part of the second groove is between the channel region of the semiconductor layer and the pixel electrode, wherein the first part, the fourth part and the second part are aligned in a first direction, wherein the first part and the third part are aligned in a second direction that is perpendicular to the first direction, wherein the fourth part, the channel region of the semiconductor layer and the fifth part are aligned in the second direction, and wherein the first groove and the second groove are separated.
9 . The display device according to claim 8 ,
wherein the first insulating layer is in direct contact with the semiconductor layer, and wherein the first insulating layer contains indium, zinc and oxygen.
10 . The display device according to claim 9 ,
wherein the oxide semiconductor contains gallium, and wherein the first insulating layer contains cerium.
11 . The display device according to claim 9 ,
wherein the oxide semiconductor contains gallium, and wherein the first insulating layer contains yttrium.Join the waitlist — get patent alerts
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