Semiconductor apparatus and method for fabricating the same

Abstract

A semiconductor apparatus includes a variable resistor including a variable resistance layer, which is formed to surround on an inner surface of a resistive region, and an insert layer which is formed in the variable resistance layer and has a resistivity being different from that of the variable resistance layer.

1 - 7 . (canceled) 
     
     
         8 . A method for fabricating a semiconductor apparatus, the method comprising:
 forming a resistive region;   forming a variable resistor in the resistive region,   wherein the forming of the variable resistor includes:   forming a variable resistance material on an inner surface of the resistive region;   forming an insert material has a resistivity being different from that of the variable resistance material and is in the variable resistance material; and   forming a variable resistance layer and an insert layer by etching back the variable resistance material and the insert material to a predetermined height.   
     
     
         9 . The method of  claim 8 , wherein the forming of the resistive region includes:
 forming a lower electrode on a semiconductor substrate;   forming an interlayer insulating layer on the semiconductor substrate; and   etching the interlayer insulating layer to form a hole exposing the lower electrode.   
     
     
         10 . The method of  claim 8 , wherein the variable resistance material is deposited through an atomic layer deposition (ALD) method. 
     
     
         11 . The method of  claim 8 , wherein the insert material is deposited through an ALD method. 
     
     
         12 . The method of  claim 9 , further comprising, between the forming of the hole and the forming of the variable resistor, forming a first upper electrode on a sidewall of the hole. 
     
     
         13 . The method of  claim 12 , wherein the forming of the first upper electrode includes:
 forming a gap-fill insulating layer in the hole;   forming the first upper electrode, which is located in the sidewall of the hole and on the gap-fill insulating layer; and   removing the gap-fill insulating layer.   
     
     
         14 . The method of  claim 13 , wherein the variable resistor is formed in the hole from which the gap-fill insulating layer is removed. 
     
     
         15 . The method of  claim 13 , further comprising, after the forming of the variable resistance layer and insert layer, forming a second upper electrode on the variable resistance layer and the insert layer. 
     
     
         16 . The method of  claim 8 , the resistance of the variable resistor may be represented as the sum of resistances of parallel resistors in a read operation.