Memory controller and simd processor

Abstract

Technology to suppress the drop in SIMD processor efficiency that occurs when exchanging two-dimensional data in a plurality of rectangular regions, between an external section and a plurality of processor elements in an SIMD processor, so that one rectangular region corresponds to one processor element. In the SIMD processor, an address storage unit in a memory controller is capable of setting N number of addresses Ai (i=1 through N) in an external memory by utilizing a control processor. A parameter storage unit is capable of setting a first parameter OSV, a second parameter W, and a third parameter L by utilizing a control processor. A data transfer unit executes the transfer of data between an external memory, and the buffers in N number of processor elements contained in the applicable SIMD processor, based on the contents of the address storage unit and the parameter storage unit.

What is claimed is: 
     
         1 . A SIMD processor which executes same processing for a plurality of rectangular regions, each of the rectangular regions comprising two-dimensional data, according to one instruction, the SIMD processors comprises:
 a plurality of processor elements, each of the processor elements storing and processing data of one of the plurality of the rectangular region, and   a memory controller comprises:   a storage which stores a plurality of first addresses each of which corresponds one of the plurality of the rectangular regions respectively, and   a transfer unit which reads data of the rectangular regions based on the plurality of the first addresses and writes each of the data in the rectangular region to corresponding one of the processor elements.   
     
     
         2 . The SIMD processor according to  claim 1 , the memory controller further comprising:
 a control processor which sets the first address in the storage.   
     
     
         3 . The SIMD processor according to  claim 1 , wherein the first addresses are beginning addresses of each of the rectangular regions. 
     
     
         4 . The SIMD processor according to  claim 1 , wherein
 the storage further stores a first parameter indicating row direction sizes of the rectangular regions and a second parameter indicating a number of rows in the rectangular regions, and   the data transfer unit reads data of the rectangular regions based on the plurality of the first addresses, the first parameter and the second parameter.   
     
     
         5 . The SIMD processor according to  claim 4 , wherein
 the control processor sets the first address, the first parameter and the second parameter in the storage.   
     
     
         6 . The SIMD processor according to  claim 4 , wherein
 the first parameter is maximum value among row direction sizes of rectangular regions, and   the second parameter is maximum value among a number of rows of rectangular regions.   
     
     
         7 . The SIMD processor according to  claim 1 , wherein the two-dimensional data is image data and each of the rectangular regions comprises a plurality of pixel data.