Device, system and method of accessing data stored in a memory

Abstract

Methods and systems are provided for accessing data stored in a memory. An example system may comprise a memory and one or more control circuits for managing access to the memory. The memory may comprise a first portion for storing a plurality of data items, and a second portion, distinct from the first portion, for storing access related information. The access related information may comprise a plurality of access entries, with each access entry corresponding to a particular respective data item. In response to request for a particular data item, the one or more control circuits may search for a match in the access related information access, and may provide access to a data item in the first portion of the memory, corresponding to the requested data item, only in response to detecting a match in the plurality of access entries, based on item related information provided in the request.

1 - 20 . (canceled) 
     
     
         21 . An apparatus comprising:
 a memory; and   one or more control circuits configured for managing access to said memory;   wherein:
 said memory comprises at least a first portion configured for storing a plurality of data items and a second portion, distinct from said first portion, configured for storing access related information; 
 said access related information comprises a plurality of access entries, with each access entry corresponding to a particular respective data item in said plurality of data items; and 
 said one or more control circuits are operable to:
 in response to a request for a particular data item, search for a match in said access related information access; and 
 provide access to a data item in said first portion, corresponding to said requested data item, only in response to detecting a match in said plurality of access entries, based on item related information provided in said request. 
 
   
     
     
         22 . The apparatus of  claim 21 , wherein said one or more circuits comprise a processor operable to execute a software memory manager that manages said second portion in said memory. 
     
     
         23 . The apparatus of  claim 21 , wherein said one or more circuits comprise:
 one or more input registers;   one or more output registers; and   a searcher circuit;   wherein:
 said one or more input registers are operable to store item related information provided when requesting data items and one or more search parameters; and 
 said searcher circuit is operable to:
 search said access related information stored in said second portion based on provided item related information and said one or more search parameters; and 
 when a match is detected, store access information obtained from an access entry, identified based on said detection, in said one or more output registers. 
 
   
     
     
         24 . The apparatus of  claim 23 , wherein said searcher circuit is operable to store, in said one or more output registers, an indication of an empty entry when no match is detected or when detected access entry indicates that a requested data item is not available. 
     
     
         25 . The apparatus of  claim 23 , wherein said one or more search parameters comprise one or more of length of identifiers, maximum number of entries, size of entries, an indication of a first address, size of one or both of said first portion and said second portion, and an indication of a last address. 
     
     
         26 . The apparatus of  claim 21 , wherein said one or more circuits are operable to initialize said second portion of said memory. 
     
     
         27 . The apparatus of  claim 26 , wherein said initializing comprises storing an empty-address identifier in each access entry. 
     
     
         28 . The apparatus of  claim 27 , wherein said one or more circuits are operable to update each access entry by replacing said empty-address identifier with said pointer entry based on an address of a corresponding data item in said first portion of said memory. 
     
     
         29 . The apparatus of  claim 21 , wherein said one or more control circuits are operable to:
 copy into said memory at least one data item from a second memory, and   add or adjust at least one access entry in said second portion of said memory for accessing said copied at least one data item.   
     
     
         30 . The apparatus of  claim 21 , comprising a system-on-chip. 
     
     
         31 . The apparatus of  claim 30 , wherein said system-on-chip comprises a communication network gateway system-on-chip, and said plurality of data items comprises information related to a plurality of communication packets. 
     
     
         32 . The apparatus of  claim 21 , wherein each access entry in said plurality of access entries comprises an identifier of a respective data item and a pointer to an address of said respective data item in said first portion. 
     
     
         33 . A method comprising:
 storing in a first portion of a memory a plurality of data items;   storing in a second portion of said memory, distinct from said first portion, access related information that comprises a plurality of access entries, with each access entry corresponding to a particular respective data item in said plurality of data items; and   managing access to said plurality of data items in said first portion using said access related information in said second portion, wherein said managing comprises:
 in response to a request for particular data item, searching for a match in said access related information access; and 
 providing access to a data item in said first portion, corresponding to said requested data item, only in response to detecting a match in said plurality of access entries, based on item related information provided in said request. 
   
     
     
         34 . The method of  claim 33 , comprising:
 storing one or more search parameters;   searching said access related information based on said provided item related information and said one or more search parameters; and   when a match is detected, storing access information obtained from an access entry, identified based on said detection.   
     
     
         35 . The method of  claim 34 , comprising storing, when no match is detected, an indication of an address of an empty entry in said cache. 
     
     
         36 . The method of  claim 34 , wherein said one or more search parameters comprise one or more of length of identifiers, maximum number of entries, size of entries, an indication of a first address, size of one or both of said first portion and said second portion, and an indication of a last address. 
     
     
         37 . The method of  claim 33 , comprising initializing said second portion of said memory. 
     
     
         38 . The method of  claim 37 , wherein said initializing comprises storing an empty-address identifier in each access entry. 
     
     
         39 . The method of  claim 38 , comprising updating each access entry by replacing said empty-address identifier with said pointer entry based on an address of a corresponding data item in said first portion of said memory. 
     
     
         40 . The method of  claim 33 , comprising:
 copying into said second portion of said memory at least one data item from a second memory, and   adding or adjusting at least one access entry in said second portion of said memory for accessing said copied at least one data item.