Stand-by mode of an electronic circuit

Abstract

A microcontroller includes a core and a unit for managing the power supply of the core that includes an input for receiving an external signal indicating a leaving of a stand-by mode of operation. A signal intercepting unit intercepts the external signal and transmitting it with a delay to the unit for managing.

1 . A microcontroller, comprising:
 a core circuit;   a circuit for managing a core power supply comprising at least one input for receiving an external signal for leaving a stand-by mode; and   a signal intercepting circuit configured to intercept said external signal and transmitting it with a delay to said circuit for managing.   
     
     
         2 . The microcontroller of  claim 1 , wherein the circuit for managing comprises a logic circuit configured to store said input signal. 
     
     
         3 . The microcontroller of  claim 2 , wherein said logic circuit is reset by the circuit for managing at the end of said delay. 
     
     
         4 . The microcontroller of  claim 2 , wherein said signal intercepting circuit receives the output of said logic circuit and combines it with data representative of a power supply voltage of the microcontroller. 
     
     
         5 . The microcontroller of  claim 4 , wherein said signal intercepting circuit triggers an interruption when a level of the power supply voltage reaches a threshold. 
     
     
         6 . A microcontroller, comprising:
 a core circuit powered by a power supply;   a power management circuit configured to reset said power supply in response to a control signal;   a logic store circuit configured to receive and store a wake-up signal;   a logic gate circuit having a first input configured to receive an output of the logic store circuit and a second input configured to receive a delay control signal, said logic gate circuit passing the output of the logic store circuit as the control signal when the delay control signal is asserted; and   a timing circuit configured to generate the delay control signal in response to a supply voltage exceeding a threshold.   
     
     
         7 . The microcontroller of  claim 6 , wherein the timing circuit comprises:
 a power supply monitoring circuit configured to compare the supply voltage to the threshold, and   a timer circuit configured to delay an output of the power supply monitoring circuit in generating the delay control signal.   
     
     
         8 . The microcontroller of  claim 6 , wherein said logic store circuit is reset when the power management circuit reset said power supply. 
     
     
         9 . A power supply reset circuit, comprising:
 a logic store circuit configured to receive and store a wake-up signal;   a logic gate circuit having a first input configured to receive an output of the logic store circuit and a second input configured to receive a delay control signal, said logic gate circuit passing the output of the logic store circuit to generate a wake-up control signal when the delay control signal is asserted; and   a timing circuit configured to generate the delay control signal in response to a supply voltage exceeding a threshold.   
     
     
         10 . The circuit of  claim 9 , wherein the timing circuit comprises:
 a power supply monitoring circuit configured to compare the supply voltage to the threshold, and   a timer circuit configured to delay an output of the power supply monitoring circuit in generating the delay control signal.   
     
     
         11 . The circuit of  claim 10 , wherein said logic store circuit is reset after a delay set by said timer circuit expires.