Floating point multiply accumulator multi-precision mantissa aligner

Abstract

A processing device is provided that includes a first, second and third precision operation circuit. The processing device further includes a shared, bit-shifting circuit that is communicatively coupled to the first, second and third precision operation circuits. A method is also provided for multiplying a first and second binary number including adding a first exponent value associated with the first binary number to a second exponent value associated with the second binary number and multiplying a first mantissa value associated with the first binary number to a second mantissa value associated with the second binary number. The method includes performing the exponent adding and mantissa multiplying substantially in parallel. The method further includes performing at least one of adding or subtracting a third binary number to the product. Also provided is a computer readable storage device encoded with data for adapting a manufacturing facility to create an apparatus.

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         8 . A method comprising:
 multiplying, at a processing device, a first binary number and a second binary number to obtain a product, wherein multiplying comprises adding a first exponent value associated with the first binary number to a second exponent value associated with the second binary number to obtain an exponent sum and multiplying a first mantissa value associated with the first binary number to a second mantissa value associated with the second binary number, and wherein the exponent adding and the mantissa multiplying are performed substantially in parallel; and   performing, at the processing device, at least one of adding a third binary number to the product or subtracting the third binary number from the product.   
     
     
         9 . The method of  claim 8 , further comprising:
 comparing the exponent sum to a third exponent value associated with the third binary number; and   shifting a third mantissa associated with the third binary number based at least in part on the comparison of the third exponent value to the exponent sum.   
     
     
         10 . The method of  claim 9 , further comprising biasing at least one of the first exponent value, second exponent value, third exponent value or the exponent sum, such that shifting is performed by shifting to the right. 
     
     
         11 . The method of  claim 8 , wherein the first, second and third binary numbers conform to at least one of an extended-precision standard, a double-precision standard or a single-precision standard. 
     
     
         12 . The method of  claim 11 , wherein the multiplying and the at least one of adding or subtracting are performed by embedding at least one lower precision operation in at least one higher precision operational datapath. 
     
     
         13 . The method of  claim 11 , wherein performing the exponent adding and the mantissa multiplying substantially in parallel comprises performing the exponent adding and the mantissa multiplying using two parallel, single-precision operations; and
 wherein a higher precision datapath and at least one lower precision datapath comprise a shared datapath portion.   
     
     
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