Variable resistance memory device and verify method thereof

Abstract

A resistance variable memory has a controller configured to control a voltage to be applied to the memory cell. The controller has a reset operation to bring the memory cell into a reset state, a first operation to apply a set voltage between the first wire and the second wire, a second operation to determine whether a current flowing to the memory cell to be set exceeds a first threshold when a first reading voltage is applied between the first wire and the second wire, a third operation to determine whether a current flowing to the memory cell to be set exceeds a second threshold when a second reading voltage is applied between the first wire and the second wire, and a fourth operation to apply a second reset voltage, between the first wire and the second wire.

1 . A verification method for a resistance variable memory, the resistance variable memory comprising:
 a plurality of first wires;   a plurality of second wires extending in a direction crossing to the plurality of first wires; and   a plurality of memory cells including variable resistance elements arranged at each of crossing points between the first wires and the second wires,   the verification method comprising:   performing a first operation of applying a first reset voltage and then a set voltage between the first wire and second wire, which are connected to the memory cell to be set;   performing, after the first operation, a second operation to determine whether a current flowing to the memory cell to be set exceeds a first threshold when a first reading voltage is applied between the first wire and the second wire, which are connected to the memory cell to be set;   performing a third operation to determine whether a current flowing to the memory cell to be set exceeds a second threshold when the second reading voltage is applied between the first wire and the second wire, which are connected to the memory cell to be set, when it has been determined in the second operation that the current has exceeded the first threshold; and   performing a fourth operation to apply a second reset voltage having an absolute value smaller than an absolute value of the first reset voltage, between the first wire and the second wire, which are connected to the memory cell to be set, when it has been determined in the third operation that the current has exceeded the second threshold.   
     
     
         2 . The verification method according to  claim 1 ,
 wherein the set voltage is a voltage satisfying requirements for a voltage level and a voltage application period necessary for setting the memory cell,   wherein the first reading voltage is a voltage corresponding to an upper limit in the requirements for the voltage level and the voltage application period necessary for reading the memory cell,   wherein the second reading voltage is a voltage corresponding to a lower limit in the requirements for the voltage level and the voltage application period necessary for reading the memory cell, and   wherein the second reset voltage is a voltage corresponding to a low reset state which does not satisfy a voltage level and a voltage application period necessary for resetting the memory cell.   
     
     
         3 . The verification method according to  claim 1 ,
 wherein a voltage level of the set voltage is higher than a voltage level of the first reading voltage, and a voltage level of the first reading voltage is higher than a voltage level of the second reading voltage.   
     
     
         4 . The verification method according to  claim 1 ,
 wherein the first operation is performed again with respect to the memory cell to be set when it has been determined in the second operation that the current has not exceeded the first threshold.   
     
     
         5 . The verification method according to  claim 1 ,
 wherein it is determined that the memory cell to be set is set when it has been determined in the third operation that the current has not exceeded the second threshold.   
     
     
         6 . The verification method according to  claim 1 , further comprising:
 performing, after the fourth operation, a fifth operation to determine whether a current flowing to the memory cell to be set exceeds the first threshold when the first reading voltage is applied between the first wire and the second wire, which are connected to the memory cell to be set; and   performing a sixth operation to determine whether a current flowing to the memory cell to be set exceeds a second threshold when the second reading voltage is applied between the first wire and the second wire, which are connected to the memory cell to be set, when it has been determined in the fifth operation that the current has exceeded the first threshold.