US2017125617A1PendingUtilityA1

Solar cell and method of manufacturing the same

Assignee: LG ELECTRONICS INCPriority: Aug 18, 2009Filed: Nov 21, 2016Published: May 4, 2017
Est. expiryAug 18, 2029(~3.1 yrs left)· nominal 20-yr term from priority
Y02E10/547Y02E10/52H01L 31/0682H01L 31/022441H01L 31/1864H01L 31/1804H01L 31/02366H01L 31/02168H10F 77/707H10F 77/703H10F 77/315H10F 77/211H10F 77/70H10F 71/128H10F 71/121H10F 71/00H10F 10/146H10F 10/14H10F 77/219Y02P70/50
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Claims

Abstract

A method of manufacturing a solar cell is discussed. The method includes forming a textured structure on a front surface of a silicon substrate; forming a front passivation layer on the front surface of the silicon substrate; forming an anti-reflection layer on the front passivation layer; forming a first layer having a dopant of a first conductive type on a first portion of a rear surface of the silicon substrate; forming a second layer having a dopant of a second conductive type on the first layer and a second portion of the rear surface of the silicon substrate; diffusing the dopant of the first layer and the dopant of the second layer into the silicon substrate to form a n-doped region and a p-doped region, respectively, wherein the n-doped region and the p-doped region are disposed at about a same depth from the rear surface of the silicon substrate.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of manufacturing a solar cell, the method comprising:
 forming a textured structure on a front surface of a silicon substrate;   forming a front passivation layer on the front surface of the silicon substrate;   forming an anti-reflection layer on the front passivation layer;   forming a first layer having a dopant of a first conductive type on a first portion of a rear surface of the silicon substrate;   forming a second layer having a dopant of a second conductive type on the first layer and a second portion of the rear surface of the silicon substrate;   diffusing the dopant of the first layer and the dopant of the second layer into the silicon substrate to form a n-doped region and a p-doped region, respectively, wherein the n-doped region and the p-doped region are disposed at about a same depth from the rear surface of the silicon substrate, and wherein the first layer shields the silicon substrate from the dopant of the second layer;   forming a rear passivation layer on the n-doped region and the p-doped region, the rear passivation layer including at least one of silicon nitride (SiNx) and silicon oxide (SiOx);   removing portions of the rear passivation layer to partially expose the n-doped region and the p-doped region; and   forming a first electrode electrically connected to the n-doped region and a second electrode electrically connected to the p-doped region, wherein the forming of the first or second electrode comprises:   forming a metal layer having a first section in contact with one of the n-doped region and the p-doped region, and a second section in contact with the rear passivation layer;
 forming a diffusion barrier layer on the metal layer; 
 forming a first conductive layer on the diffusion barrier layer; and 
 forming a second conductive layer on the first conductive layer. 
   
     
     
         2 . The method of  claim 1 , wherein the forming of the metal layer includes depositing a seed material containing nickel to a thickness of about 50 nm to 200 nm using a vacuum method and performing a thermal processing at a temperature of about 300° C. to 600° C. in a nitrogen atmosphere. 
     
     
         3 . The method of  claim 2 , wherein the vacuum method includes a sputtering method and an electron beam evaporation method. 
     
     
         4 . The method of  claim 1 , wherein the forming of the metal layer includes depositing nickel unto a surface of each of the n-doped and p-doped regions. 
     
     
         5 . The method of  claim 4 , wherein the metal layer is deposited to a thickness of about 50 nm to 200 nm. 
     
     
         6 . The method of  claim 4 , wherein the metal layer is deposited through an electroless plating method using an electrolyte containing a nickel precursor and performing a thermal processing at a temperature of about 300° C. to 600° C. in a nitrogen atmosphere. 
     
     
         7 . The method of  claim 1 , wherein the forming of the metal layer includes depositing a seed material containing aluminum. 
     
     
         8 . The method of  claim 1 , wherein the forming of the metal layer further includes performing a zincate processing on an aluminum surface of the seed material. 
     
     
         9 . The method of  claim 7 , wherein the depositing of the seed material containing aluminum is carried out using a vacuum method including a sputtering method and an electron beam evaporation method. 
     
     
         10 . The method of  claim 9 , wherein the seed material containing aluminum is deposited to a thickness of about 50 nm to 200 nm. 
     
     
         11 . The method of  claim 7 , wherein the forming of the metal layer further includes performing a thermal processing on vapor deposited aluminum. 
     
     
         12 . The method of  claim 11 , wherein the thermal processing of the vapor deposited aluminum is performed at a temperature of about 350° C. to 500° C. in a hydrogen atmosphere. 
     
     
         13 . The method of  claim 1 , wherein the forming of the first conductive layer includes plating a copper layer on the diffusion barrier layer. 
     
     
         14 . The method of  claim 13 , wherein the first conductive layer is plated to a thickness of about 10 μm to 30 μm. 
     
     
         15 . The method of  claim 13 , wherein the forming of the second conductive layer includes plating a tin layer on the copper layer. 
     
     
         16 . The method of  claim 15 , wherein the second conductive layer is plated to a thickness of about 5 μm to 15 μm. 
     
     
         17 . The method of  claim 10 , wherein the forming of the diffusion barrier layer includes plating nickel on the metal layer. 
     
     
         18 . The method of  claim 17 , wherein the diffusion barrier layer is plated to a thickness of about 5 μm to 15 μm using an electroplating method. 
     
     
         19 . The method of  claim 1 , wherein the forming of the second conductive layer includes plating a tin layer on a bottom surface and side surfaces of the first conductive layer. 
     
     
         20 . A method of manufacturing a solar cell, the method comprising:
 forming a textured structure on a front surface of a silicon substrate;   forming a front passivation layer on the front surface of the silicon substrate;   forming a first layer having a dopant of a first conductive type on a first portion of a rear surface of the silicon substrate;   forming a second layer having a dopant of a second conductive type on the first layer and a second portion of the rear surface of the silicon substrate;   forming a rear passivation layer on an n-doped region corresponding to the first portion and a p-doped region corresponding to the second portion, the rear passivation layer including at least one of silicon nitride (SiNx) and silicon oxide (SiOx);   removing portions of the rear passivation layer to partially expose the n-doped region and the p-doped region; and   forming a first electrode electrically connected to the n-doped region and a second electrode electrically connected to the p-doped region, wherein the forming of the first or second electrode comprises:
 forming a metal layer having a first section in contact with one of the n-doped region and the p-doped region, and a second section in contact with the rear passivation layer; 
 forming a diffusion barrier layer on the metal layer; and 
 forming a conductive layer on the diffusion barrier layer.

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