Nonvolatile memory apparatus

Abstract

A nonvolatile memory apparatus includes a sensing voltage generation unit, a memory cell, a current copy unit and a data sensing unit. The sensing voltage generation unit provides a sensing voltage with a constant level, to a sensing node. The memory cell receives the sensing voltage from the sensing node. The current copy unit generates copied current with substantially the same magnitude as sensing current which flows through the memory cell. The data sensing unit senses the copied current and generates a multi-bit data to output signal.

1 . A nonvolatile memory apparatus comprising:
 a memory cell array including a plurality of memory cells having one ends which are respectively connected with a plurality of bit lines and other ends which are respectively connected with a plurality of word lines;   a sensing voltage generation block configured to provide a sensing voltage to the one ends of the plurality of memory cells; and   a data sensing block connected between the other ends of the plurality memory cells and the plurality of word lines, and configured to receive and sense sensing current which flows through the memory cells and generate a data output signal.   
     
     
         2 . The nonvolatile memory apparatus according to  claim 1 ,
 wherein the data sensing block includes a plurality of data sensing units which are respectively connected with the plurality of memory cells, and   wherein the plurality of data sensing units compare current which flows through the memory cells respectively connected therewith and reference cell current generated from reference cells, and generate the data output signal.   
     
     
         3 . The nonvolatile memory apparatus according to  claim 2 , wherein the reference cells are disposed in the data sensing block. 
     
     
         4 . A nonvolatile memory apparatus comprising:
 a memory cell array including memory cells one ends of which are respectively connected with a plurality of bit lines;   a sensing voltage generation block configured to provide a sensing voltage to the memory cell array; and   a data sensing block disposed below the memory cell array in a vertical direction, connected with the other ends of the memory cells, and configured to sense current which flows through the memory cells in response to directly receiving a plurality of word line select signals and generate a data output signal.   
     
     
         5 . The nonvolatile memory apparatus according to  claim 4 ,
 wherein the data sensing block includes a plurality of data sensing units which are respectively connected with a plurality of word lines and the plurality of memory cells, and   wherein the plurality of data sensing units respectively receive current flowing through the memory cells when the word lines are enabled, compare the current flowing through the memory cells and reference current generated from reference cells, and generate the data output signal.   
     
     
         6 . The nonvolatile memory apparatus according to  claim 5 , wherein the reference cells are disposed in the memory cell array. 
     
     
         7 . The nonvolatile memory apparatus according to  claim 5 , wherein the reference cells are disposed at a position different from the sensing voltage generation block.