Semiconductor device and electronic device

Abstract

A semiconductor device with a novel structure is provided. Input neuron circuits, hidden neuron circuits, and output neuron circuits are hierarchically connected to one another through plural synapse circuits. Each synapse circuit includes an analog memory which stores data corresponding to a connection strength between the input neuron circuit and the hidden neuron circuit or between the hidden neuron circuit and the output neuron circuit, a writing circuit which changes the data in the analog memory, and a weighting circuit which outputs an output signal obtained by weighting an input signal in accordance with data in the analog memory. The analog memory is formed using a transistor including an oxide semiconductor having extremely low off-state current. It is not necessary to mount a large-scale capacitor for holding data and to recover analog data by regular refresh operation; thus, reduction in a chip area and reduction in power consumption are possible.

1 . A semiconductor device comprising:
 a first circuit;   a second circuit;   a third circuit;   a fourth circuit; and   a fifth circuit,   wherein the first circuit is configured to amplify a first signal and output the amplified first signal to the second circuit,   wherein the second circuit includes a first multiplier circuit configured to change first data corresponding to a first connection strength, a first analog memory configured to store the first data, and a second multiplier circuit configured to output a second signal obtained by weighting the first signal in accordance with the first data,   wherein the third circuit is configured to convert the second signal from current to voltage and output the converted second signal to the fourth circuit,   wherein the fourth circuit includes a third multiplier circuit configured to change second data corresponding to a second connection strength, a second analog memory configured to store the second data, and a fourth multiplier circuit configured to output a third signal obtained by weighting the second signal in accordance with the second data,   wherein the fifth circuit is configured to convert the third signal from current to voltage and output to an outside, and   wherein the fifth circuit is configured to generate a fifth signal from a difference between the third signal converted from current to voltage and a fourth signal input from an outside.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein the first analog memory and the second analog memory each include a transistor including an oxide semiconductor in a channel formation region.   
     
     
         3 . The semiconductor device according to  claim 1 ,
 wherein the first multiplier circuit is configured to change the first data in accordance with the first signal and the third signal.   
     
     
         4 . The semiconductor device according to  claim 1 ,
 wherein the third multiplier circuit is configured to change the second data in accordance with the second signal and the fifth signal.   
     
     
         5 . An electronic device comprising:
 an encoder configured to encode image data with the semiconductor device according to  claim 1 ,   wherein the image data comprises first data and second data,   wherein the semiconductor device compares the first data and the second data when the first data and the second data are input to the semiconductor device, and   wherein a motion vector from the first data to the second data is obtained when the first data and the second data match.   
     
     
         6 . A semiconductor device comprising:
 an input neuron circuit;   a first synapse circuit;   a first error circuit;   a second neuron circuit; and   a second error circuit,   wherein the input neuron circuit is configured to amplify a first signal and output the amplified first signal to the first synapse circuit,   wherein the first synapse circuit includes a first circuit configured to change first data corresponding to a first connection strength, a first analog memory configured to store the first data, and a second circuit configured to output a second signal obtained by weighting the first signal in accordance with the first data,   wherein the first error circuit is configured to convert the second signal from current to voltage and output the converted second signal to the second neuron circuit,   wherein the second neuron circuit includes a third circuit configured to change second data corresponding to a second connection strength, a second analog memory configured to store the second data, and a fourth circuit configured to output a third signal obtained by weighting the second signal in accordance with the second data,   wherein the second error circuit is configured to convert the third signal from current to voltage and output to an outside, and   wherein the second error circuit is configured to generate a fifth signal from a difference between the third signal converted from current to voltage and a fourth signal input from an outside.   
     
     
         7 . The semiconductor device according to  claim 6 ,
 wherein the first analog memory and the second analog memory each include a transistor including an oxide semiconductor in a channel formation region.   
     
     
         8 . The semiconductor device according to  claim 6 ,
 wherein the first circuit, the second circuit, the third circuit and the fourth circuit each comprises a multiplier circuit.   
     
     
         9 . The semiconductor device according to  claim 6 ,
 wherein the first circuit is configured to change the first data in accordance with the first signal and the third signal.   
     
     
         10 . The semiconductor device according to  claim 6 ,
 wherein the third circuit is configured to change the second data in accordance with the second signal and the fifth signal.   
     
     
         11 . An electronic device comprising:
 an encoder configured to encode image data with the semiconductor device according to  claim 6 ,   wherein the image data comprises first data and second data,   wherein the semiconductor device compares the first data and the second data when the first data and the second data are input to the semiconductor device, and   wherein a motion vector from the first data to the second data is obtained when the first data and the second data match.