Level shifting circuit

Abstract

A level shifting circuit includes a level shifting portion configured to receive an input signal and generate an output signal, and a current adjustment circuit connected between the level shifting portion and a drive high voltage node at which a drive high voltage is applied. The current adjustment circuit is configured to adjust an amount of current provided from the drive high voltage node to the level shifting portion.

1 . A level shifting circuit, comprising:
 a level shifting portion configured to receive an input signal and generate an output signal; and   a current adjustment circuit connected between the level shifting portion and a drive high voltage node at which a drive high voltage is applied, and configured to adjust an amount of a current provided from the drive high voltage node to the level shifting portion,   wherein the current adjustment circuit comprises:   a first current adjustment transistor connected between the drive high voltage node and the level shifting portion, and configured to adjust a first current to be provided to a first node of the level shifting portion; and   a second current adjustment transistor connected between the drive high voltage node and the level shifting portion, and configured to adjust a second current to be provided to a second node of the level shifting portion,   wherein the first and second current adjustment transistors are turned on regardless of the input signal.   
     
     
         2 . The level shifting circuit of  claim 1 , wherein the level shifting portion comprises:
 a first transistor connected between a ground terminal and a third node, and turned on according to the input signal;   a second transistor connected between the ground terminal and an output node outputting the output signal, and turned on according to an inverted signal of the input signal;   a third transistor connected between the first node and a fourth node, and turned on according to the output signal;   a fourth transistor connected between the second node and a fifth node, and turned on according to a voltage level of the third node;   a fifth transistor connected between the fourth node and the third node, and turned on according to the input signal; and   a sixth transistor connected between the fifth node and the output node, and turned on according to the inverted signal of the input signal.   
     
     
         3 . The level shifting circuit of  claim 1 , wherein the current adjustment circuit further comprises:
 at least one third current adjustment transistor serially connected between the first current adjustment transistor and the drive high voltage node; and   at least one fourth current adjustment transistor serially connected between the second current adjustment transistor and the drive high voltage node,   wherein the third and fourth current adjustment transistors are turned on regardless of the input signal.   
     
     
         4 . The level shifting circuit of  claim 1 , further comprising:
 at least one third current adjustment transistor serially connected between the drive high voltage node and the first current adjustment transistor, and turned on according to the input signal; and   at least one fourth current adjustment transistor serially connected between the drive high voltage node and the second current adjustment transistor, and turned on according to an inverted signal of the input signal.   
     
     
         5 . The level shifting circuit of  claim 2 , further comprising:
 at least one third current adjustment transistor serially connected between the third transistor and the fifth transistor, and turned on according to the input signal; and   at least one fourth current adjustment transistor serially connected between the fourth transistor and the sixth transistor, and turned on according to the inverted signal of the input signal.   
     
     
         6 . The level shifting circuit of  claim 2 ,
 wherein the first and second transistors are turned on when a first voltage level is applied to a gate terminal of each of the first and second transistors,   wherein the third to sixth transistors and the first and second current adjustment transistors are turned on when a second voltage level different from the first voltage level is applied to a gate terminal of each of the third to sixth transistors and the first and second current adjustment transistors.   
     
     
         7 . The level shifting circuit of  claim 2 , wherein the fourth and sixth transistors are turned on when the first transistor is turned on, and the third and fifth transistors are turned on when the second transistor is turned on. 
     
     
         8 . The level shifting circuit of  claim 2 , further comprising:
 an inverter that receives and inverts the input signal.   
     
     
         9 . A level shifting circuit, comprising:
 a first transistor connected between a ground terminal and a first node, and turned on according to an input signal;   a second transistor connected between the ground terminal and an output node that outputs an output signal corresponding to the input signal, and turned on according to an inverted signal of the input signal;   a first current adjustment transistor connected between the first node and a second node, and turned on regardless of the input signal;   a second current adjustment transistor connected between the output node and a third node, and turned on regardless of the input signal;   a third transistor connected between the second node and a fourth node, and turned on according to the input signal;   a fourth transistor connected between the third node and a fifth node, and turned on according to the inverted signal of the input signal;   a fifth transistor connected between the fourth node and a drive high voltage node at which a drive high voltage is applied, and turned on according to a voltage level of the third node; and   a sixth transistor connected between the fifth node and the drive high voltage node, and turned on according to a voltage level of the second node,   wherein a voltage level of the output signal is determined based on the drive high voltage.   
     
     
         10 . The level shifting circuit of  claim 9 , further comprising:
 at least one third current adjustment transistor serially connected between the second node and the first current adjustment transistor; and   at least one fourth current adjustment transistor serially connected between the third node and the second current adjustment transistor,   wherein the at least one third and fourth current adjustment transistors are turned on regardless of the input signal.   
     
     
         11 . The level shifting circuit of  claim 9 , further comprising:
 at least one third current adjustment transistor serially connected between the third transistor and the fifth transistor, and turned on according to the input signal; and   at least one fourth current adjustment transistor serially connected between the fourth transistor and the sixth transistor, and turned on according to the inverted signal of the input signal.   
     
     
         12 . The level shifting circuit of  claim 9 ,
 wherein the first and second transistors are turned on when a first voltage level is applied to a gate terminal of each of the first and second transistors,   wherein the third to sixth transistors and the first and second current adjustment transistors are turned on when a second voltage level different from the first voltage level is applied to a gate terminal of each of the third to sixth transistors and the first and second current adjustment transistors.   
     
     
         13 . A level shifting circuit, comprising:
 a first transistor connected between a ground terminal and a first node, and turned on according to an input signal;   a second transistor connected between the ground terminal and an output node that outputs an output signal corresponding to the input signal, and turned on according to an inverted signal of the input signal;   a third transistor connected between the first node and a second node, and turned on according to the input signal;   a fourth transistor connected between the output node and a third node, and turned on according to the inverted signal of the input signal;   a first current adjustment transistor connected between the second node and a fourth node, and turned on regardless of the input signal;   a second current adjustment transistor connected between the third node and a fifth node, and turned on regardless of the input signal;   a fifth transistor connected between the fourth node and a drive high voltage node at which a drive high voltage is applied, and turned on according to the output signal; and   a sixth transistor connected between the fifth node and the drive high voltage node, and turned on according to a voltage level of the first node,   wherein a voltage level of the output signal is determined based on the drive high voltage.   
     
     
         14 . The level shifting circuit of  claim 13 , further comprising:
 at least one third current adjustment transistor serially connected between the first current adjustment transistor and the fifth transistor; and   at least one fourth current adjustment transistor serially connected between the second current adjustment transistor and the sixth transistor,   wherein the at least one third and fourth current adjustment transistors are turned on regardless of the input signal.   
     
     
         15 . The level shifting circuit of  claim 13 , further comprising:
 at least one third current adjustment transistor serially connected between the drive high voltage node and the fifth transistor, and turned on according to the input signal; and   at least one fourth current adjustment transistor serially connected between the drive high voltage node and the sixth transistor, and turned on according to the inverted signal of the input signal.   
     
     
         16 . The level shifting circuit of  claim 13 , further comprising:
 at least one third current adjustment transistor serially connected between the third transistor and the first current adjustment transistor, and turned on according to the input signal; and   at least one fourth current adjustment transistor serially connected between the fourth transistor and the second current adjustment transistor, and turned on according to the inverted signal of the input signal.   
     
     
         17 . The level shifting circuit of  claim 13 ,
 wherein the first and second transistors are turned on when a first voltage level is applied to a gate terminal of each of the first and second transistors,   wherein the third to sixth transistors and the first and second current adjustment transistors are turned on when a second voltage level different from the first voltage level is applied to a gate terminal of each of the third to sixth transistors and the first and second current adjustment transistors.   
     
     
         18 - 20 . (canceled) 
     
     
         21 . The level shifting circuit of  claim 1 ,
 wherein a gate terminal of the first current adjustment transistor is connected to a ground terminal, and   wherein a gate terminal of the second current adjustment transistor is connected to a ground terminal.   
     
     
         22 . The level shifting circuit of  claim 1 , wherein the current adjustment circuit further comprises:
 at least one third current adjustment transistor serially connected between the first current adjustment transistor and the drive high voltage node, wherein a gate terminal of the at least one third current adjustment transistor is connected to the ground terminal; and   at least one fourth current adjustment transistor serially connected between the second current adjustment transistor and the drive high voltage node, wherein a gate terminal of the at least one fourth current adjustment transistor is connected to the ground terminal.   
     
     
         23 . The level shifting circuit of  claim 9 ,
 wherein a gate terminal of the first current adjustment transistor is connected to a ground terminal, and   wherein a gate terminal of the second current adjustment transistor is connected to a ground terminal.