Nonvolatile memory device and method of programming the same

Abstract

In a method of programming a three-dimensional nonvolatile memory device, a program loop is executed at least one time, wherein the program loop includes a programming step for programming selected memory cells among the memory cells and a verifying step for verifying whether the selected memory cells are program-passed or not. In the programming the selected memory cells, a level of a voltage being applied to a common source line connected to the strings in common may be changed. Thus, in a program operation, power consumption which is needed to charge-discharge the common source line can be decreased while increasing boosting efficiency.

What is claimed is: 
     
         1 . A method of programming a three-dimensional (3D) memory cell array which includes a plurality of memory cell strings, each of the memory cell strings extending in a direction vertical to a substrate, an upper end of the memory cell string being connected with a bit line and a lower end of the memory cell string being connected with a common source line (CSL), and each of the memory cell strings including a plurality of memory cells, each of the plurality of memory cells being programmed by applying a programming voltage to a word line connected with the memory cell, the method comprising:
 executing a first programming loop, the first programming loop comprising:
 applying a first programming voltage to a selected word line; 
 applying a first common source line voltage to a common source line during applying the first programming voltage; 
 applying a first verify voltage to the selected word line to determine whether the selected memory cells are program-passed or not; and 
 applying a reference voltage to the common source line during applying the first verify voltage; and 
   executing a second programming loop, the second programming loop comprising:
 applying a second programming voltage to the selected word line; 
 applying a second common source line voltage to the common source line during applying the second programming voltage; 
 applying a second verify voltage to the selected word line to determine whether the selected memory cells are program-passed or not; and 
 applying the reference voltage to the common source line during applying the second verify voltage, 
   wherein the second programming voltage is greater than the first programming voltage and the second common source line voltage is greater than the first common source line voltage respectively.