US2017110399A1PendingUtilityA1

Semiconductor device and manufacturing method of the same

Assignee: RENESAS ELECTRONICS CORPPriority: Nov 8, 2013Filed: Dec 29, 2016Published: Apr 20, 2017
Est. expiryNov 8, 2033(~7.3 yrs left)· nominal 20-yr term from priority
H10P 95/00H10P 70/277H10P 50/73H10P 34/40H10P 30/20H10P 14/6922H10P 14/6682H10P 14/6336H10P 14/6334H10W 20/085H10W 20/4421H10W 20/425H10W 20/096H10W 20/095H10W 20/084H10W 20/081H10W 20/077H10W 20/076H10W 20/075H10W 20/074H10W 20/057H10W 20/056H10W 20/051H10W 20/48H10W 20/47H10W 20/42H10W 20/033H10W 20/01H10W 20/43H01L 21/76834H01L 21/02271H01L 21/76826H01L 23/528H01L 23/53228H01L 21/76879H01L 21/76883H01L 21/265H01L 23/5226H01L 21/02126H01L 21/02211H01L 21/76802H01L 23/5329
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Claims

Abstract

A semiconductor device includes an interlayer insulating film INS 2 , adjacent Cu wirings M 1 W formed in the interlayer insulating film INS 2 , and an insulating barrier film BR 1 which is in contact with a surface of the interlayer insulating film INS 2 and surfaces of the Cu wirings M 1 W and covers the interlayer insulating film INS 2 and the Cu wirings M 1 W. Between the adjacent Cu wirings M 1 W, the interlayer insulating film INS 2 has a damage layer DM 1 on its surface, and has an electric field relaxation layer ER 1 having a higher nitrogen concentration than a nitrogen concentration of the damage layer DM 1 at a position deeper than the damage layer DM 1.

Claims

exact text as granted — not AI-modified
1 - 20 . (canceled) 
     
     
         21 . A semiconductor device comprising:
 a semiconductor substrate;   an interlayer insulating film formed over the semiconductor substrate and having a main surface;   a first wiring and a second wiring which are embedded in the interlayer insulating film and are adjacent to each other;   wherein the first wiring and the second wiring are mainly made of a copper film,   wherein a surface portion of the interlayer insulating film contains nitrogen, and   wherein the surface portion of the interlayer insulating film has a distribution in nitrogen concentration, with an outermost part of the surface portion in a thickness direction having a lower nitrogen concentration than an inner part of the surface portion in the thickness direction.   
     
     
         22 . The semiconductor device according to  claim 21 ,
 wherein the outermost part of the surface portion of the interlayer insulating film is a damage layer and the inner part of the surface portion of the interlayer insulating film is an electric field relaxation layer.   
     
     
         23 . The semiconductor device according to  claim 22 ,
 wherein the interlayer insulating film is made of an insulating film having a dielectric constant of 3.0 or less.   
     
     
         24 . The semiconductor device according to  claim 23 ,
 wherein the interlayer insulating film includes Si, O, and C.   
     
     
         25 . The semiconductor device according to  claim 22 ,
 wherein the damage layer is present in a depth range of 4 nm from the main surface of the interlayer insulating film.   
     
     
         26 . The semiconductor device according to  claim 22 ,
 wherein the electric field relaxation layer has a peak region of the nitrogen concentration.   
     
     
         27 . The semiconductor device according to  claim 26 ,
 wherein the peak region of the nitrogen concentration is positioned in a range of 5 to 20 nm from the main surface of the interlayer insulating film.   
     
     
         28 . The semiconductor device according to  claim 22 ,
 wherein the electric field relaxation layer is provided at a position shallower than one-half of a thickness of the first wiring based on the main surface of the interlayer insulating film.   
     
     
         29 . The semiconductor device according to  claim 21 ,
 wherein the interlayer insulating film is made of an insulating film having a dielectric constant of 3.0 or less.   
     
     
         30 . The semiconductor device according to  claim 21 ,
 wherein each of the first wiring and the second wiring has a side face inclining so that a width of the first wiring and a width of the second wiring are increased in a direction toward the main surface.

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