US2017110376A1PendingUtilityA1
Structures with thinned dielectric material
Est. expiryOct 14, 2035(~9.2 yrs left)· nominal 20-yr term from priority
H10P 50/285H10P 50/283H10P 14/69392H10P 14/43H10D 64/01342H10D 64/01318H10D 64/0134H01L 21/823857H01L 21/31111H01L 29/517H01L 21/02181H01L 21/28185H01L 27/0922H10D 84/856H10D 84/0177H10D 84/85H10D 64/691H10D 64/667H10D 84/0181H10D 84/038
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Claims
Abstract
The disclosure relates to semiconductor structures and, more particularly, to structures with thinned dielectric material and methods of manufacture. The method includes depositing a high-k dielectric on a substrate. The method further includes depositing a titanium nitride film directly on the high-k while simultaneously etching the high-k dielectric.
Claims
exact text as granted — not AI-modifiedWhat is claimed:
1 . A method comprising:
depositing a high-k dielectric on a substrate; and depositing a titanium nitride film directly on the high-k while simultaneously etching the high-k dielectric.
2 . The method of claim 1 , wherein the depositing the TiN further includes using a precursor containing TiCl 4 .
3 . The method of claim 2 , wherein the precursor further comprises NH 3 .
4 . The method of claim 2 , wherein the TiN with precursor is deposited at a temperature of at or above about 300° C.
5 . The method of claim 4 , wherein the TiN with precursor is deposited at a temperature of about 500° C.
6 . The method of claim 1 , further comprising depositing material directly on the high-k dielectric on the pFET side prior to the etching such that the material blocks the TiN with precursor from being deposited directly on the high-k dielectric on the pFET side, and only the high-k dielectric on the nFET side of the substrate is thinned by exposing the high-k dielectric on the nFET side to the TiN with precursor.
7 . The method of claim 6 , wherein the material is deposited on the nFET side of the substrate and subsequently removed to expose the high-k dielectric on the nFET side of the substrate for the TiN with precursor to be deposited directly on the high-k dielectric on the nFET side.
8 . The method of claim 1 , wherein the high-k dielectric is etched on both the pFET side and the nFET side by depositing the TiN with precursor on exposed portions of the high-k dielectric.
9 . The method of claim 1 , wherein the high-k dielectric is HfO 2 .
10 . A method comprising:
depositing a high-k dielectric material on a pFET side and an nFET side of a substrate; and depositing titanium nitride (TiN) with a precursor of TiCl 4 directly on the high-k dielectric material on at least one of the pFET side and the nFET side of the substrate to thin the high-k dielectric material which contacts the TiCl 4 TiN.
11 . The method of claim 10 , wherein the precursor further comprises NH 3 .
12 . The method of claim 10 , wherein the high-k dielectric is HfO 2 .
13 . The method of claim 10 , wherein the TiN TiCl 4 is deposited at a temperature of at or above about 300° C.
14 . The method of claim 13 , wherein the TiN TiCl 4 is deposited at a temperature of about 500° C.
15 . The method of claim 10 , further comprising depositing material directly on the high-k dielectric material on the pFET side such that the material blocks the TiCl 4 TiN from being deposited directly on the high-k dielectric on the pFET side, and only the high-k dielectric on the nFET side of the substrate is thinned.
16 . The method of claim 15 , wherein the material is deposited on the nFET side of the substrate and subsequently removed to expose the high-k dielectric on the nFET side of the substrate for the TiCl 4 TiN to thin the high-k dielectric only on the nFET side.
17 . The method of claim 10 , wherein the material is TiN.
18 . The method of claim 10 , wherein the high-k dielectric is etched on both the pFET side and the nFET side by depositing the TiCl 4 TiN on exposed portions of the high-k dielectric on both the pFET side and the nFET.
19 . A structure, comprising:
an nFET device having a high-k dielectric material on a substrate; and a pFET device having the high-k dielectric material on the substrate, wherein high-k dielectric material of at least one of the nFET device and the pFET device is devoid of C.
20 . The structure of claim 19 , wherein only a difference in thickness of the high-k dielectric material at the nFET device and the pFET device is between about 1 Angstrom and about 3 Angstroms.Join the waitlist — get patent alerts
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