Storage device and data processing method

Abstract

A storage device includes a nonvolatile memory unit, a volatile memory unit, a power supply control unit configured to control power supply to the nonvolatile memory unit and the volatile memory unit, and a control unit configured to control the power supply unit to cut off the power supply to the nonvolatile memory unit and the volatile memory unit during a first operation, and control the power supply unit to cut off the power supply to the nonvolatile memory unit and to maintain the power supply to the volatile memory unit during a second operation that is different from the first operation.

What is claimed is: 
     
         1 . A storage device comprising:
 a nonvolatile memory;   a volatile memory;   a power supply control circuitry configured to control power supply to the nonvolatile memory and the volatile memory; and   a control circuitry configured to carry out selected one of a first operation and a second operation in response to a request received from a device external to the storage device, wherein   the first operation includes controlling the power supply circuitry to cut off the power supply to the nonvolatile memory and the volatile memory, and   the second operation includes controlling the power supply circuitry to cut off the power supply to the nonvolatile memory and to maintain the power supply to the volatile memory.   
     
     
         2 . The storage device according to  claim 1 , wherein
 the control circuitry is further configured to cause data stored in the volatile memory to be transferred to the nonvolatile memory before the power supply to the volatile memory is cut off during the second operation.   
     
     
         3 . The storage device according to  claim 2 , wherein
 the nonvolatile memory includes a nonvolatile semiconductor memory and a magnetic disk, and   the data stored in the volatile memory are transferred to the nonvolatile semiconductor memory.   
     
     
         4 . The storage device according to  claim 1 , wherein
 the request is a request to cause the storage device to enter into a sleep state.   
     
     
         5 . The storage device according to  claim 1 , further comprising:
 a second volatile memory, wherein   
       the control circuitry is further configured to control the power supply circuitry to cut off power supply to the second volatile memory during the first and second operations. 
     
     
         6 . The storage device according to  claim 5 , wherein
 the control circuitry is further configured to cause data stored in the second volatile memory to be transferred to the nonvolatile memory before the power supply to the nonvolatile memory and the power supply to the second volatile memory are cut off during the first operation.   
     
     
         7 . The storage device according to  claim 5 , wherein
 the control circuitry is further configured to cause data stored in the second volatile memory to be transferred to the volatile memory before the power supply to the second volatile memory is cut off during the second operation.   
     
     
         8 . The storage device according to  claim 5 , wherein
 the volatile memory is an SDRAM, and   
       the second volatile memory is an SRAM. 
     
     
         9 . The storage device according to  claim 1 , wherein
 the nonvolatile memory is a nonvolatile semiconductor memory.   
     
     
         10 . The storage device according to  claim 1 , wherein
 the request is notified by assertion of a sleep signal, and   the control circuitry is further configured to control the power supply control circuitry to resume the power supply to the nonvolatile memory and the power supply to the volatile memory in response to negation of the sleep signal after the first operation, and the power supply to the nonvolatile memory in response to negation of the sleep signal after the second operation.   
     
     
         11 . A method for processing a storage device including a nonvolatile memory and a volatile memory, the method comprising:
 receiving a request from a device external to the storage device; and   in response to the request received, carrying out selected one of a first operation and a second operation, wherein   the first operation includes cutting off power supply to the nonvolatile memory and power supply to the volatile memory; and   the second operation includes cutting off the power supply to the nonvolatile memory while maintaining the power supply to the volatile memory.   
     
     
         12 . The method according to  claim 11 , wherein
 the second operation further includes transferring data stored in the volatile memory to the nonvolatile memory before the power supply to the volatile memory is cut off.   
     
     
         13 . The method according to  claim 12 , wherein
 the nonvolatile memory includes a nonvolatile semiconductor memory and a magnetic disk, and   the data stored in the volatile memory are transferred to the nonvolatile semiconductor memory.   
     
     
         14 . The method according to  claim 11 , wherein
 the request is a request to cause the storage device to enter into a sleep state.   
     
     
         15 . The method according to  claim 11 , wherein
 the storage device further includes a second volatile memory, and   each of the first operation and the second operation further includes cutting off power supply to the second volatile memory.   
     
     
         16 . The method according to  claim 15 , wherein
 the first operation further includes transferring data stored in the second volatile memory to the nonvolatile memory before the power supply to the nonvolatile memory and the power supply to the second volatile memory are cut off.   
     
     
         17 . The method according to  claim 15 , wherein
 the second operation further includes transferring data stored in the second volatile memory to the volatile memory before the power supply to the second volatile memory is cut off.   
     
     
         18 . The method according to  claim 15 , wherein
 the volatile memory is an SDRAM, and   the second volatile memory is an SRAM.   
     
     
         19 . The method according to  claim 11 , wherein
 the nonvolatile memory is a nonvolatile semiconductor memory.   
     
     
         20 . The method according to  claim 11 , wherein the request is notified by assertion of a sleep signal, the method further comprising:
 resuming the power supply to the nonvolatile memory and the power supply to the volatile memory in response to negation of the sleep signal after the first operation; and   resuming the power supply to the nonvolatile memory in response to negation of the sleep signal after the second operation.