US2017104088A1PendingUtilityA1

Method and apparatus for source-drain junction formation in a finfet with in-situ doping

Assignee: QUALCOMM INCPriority: Sep 24, 2014Filed: Dec 20, 2016Published: Apr 13, 2017
Est. expirySep 24, 2034(~8.2 yrs left)· nominal 20-yr term from priority
H10P 32/1408H10P 32/171H01L 29/165H01L 21/2254H01L 29/7848H01L 29/66803H01L 29/7851H10D 64/017H10D 62/822H10D 30/6211H10D 30/797H10D 30/751H10D 30/0243H10D 30/62H10D 30/0241
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Claims

Abstract

A portion of a bulk silicon (Si) is formed into a fin, having a fin base and, on the fin base, an in-process fin. The fin base is doped Si and the in-process fin is silicon germanium (SiGe). The in-process SiGe fin has a source region and a drain region. Boron is in-situ doped into the drain region and into the source region. Optionally, boron is in-situ doped by forming an epi-layer, having boron, on the drain region and on the source region, and drive-in annealing to diffuse boron in the source region and the drain region.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An apparatus, comprising:
 a bulk silicon (Si), comprising etched trenches spaced apart by a fin stack, the fin stack comprising a doped Si fin base and, on the doped Si fin base, a lightly doped in-process silicon germanium (SiGe) fin; and   an epi layer, wherein the epi layer is on an outer surface of the lightly doped in-process SiGe fin.   
     
     
         2 . The apparatus of  claim 1 , wherein the epi layer comprises silicon germanium boron (SiGeB). 
     
     
         3 . The apparatus of  claim 1 , wherein the lightly doped in-process SiGe fin includes a source region and a drain region. 
     
     
         4 . The apparatus of  claim 3 , wherein the epi layer is on an outer surface of the drain region and is on an outer surface of the source region. 
     
     
         5 . The apparatus of  claim 1 , wherein the bulk silicon Si and the epi layer are integrated into at least one semiconductor die. 
     
     
         6 . The apparatus of  claim 1 , integrated into a device selected from the group consisting of a set top box, music player, video player, entertainment unit, navigation device, communications device, personal digital assistant (PDA), fixed location data unit, and a computer. 
     
     
         7 . A FinFET apparatus, comprising:
 a fin stack comprising a silicon (Si) fin base and, on the Si fin base, a silicon germanium (SiGe) fin, wherein the SiGe fin comprises a boron doped source region and a boron doped drain region; and   an epi layer, wherein the epi layer covers at least an outer surface of the boron doped source region, and wherein the epi layer comprises silicon germanium boron (SiGeB).   
     
     
         8 . The FinFET apparatus of  claim 7 , wherein the epi layer comprises a boron concentration in a range that spans from approximately 1E20 atoms per cubic centimeter (at/cm 3 ) to approximately 2E20 at/cm 3 . 
     
     
         9 . The FinFET apparatus of  claim 7 , wherein the epi layer is a source epi layer, and wherein the FinFET apparatus further comprises a drain epi layer, wherein the drain epi layer comprises SiGeB, and wherein the drain epi layer covers at least an outer surface of the boron doped drain region. 
     
     
         10 . The FinFET apparatus of  claim 7 , wherein the fin stack and the epi layer are integrated into at least one semiconductor die. 
     
     
         11 . The FinFET apparatus of  claim 7 , integrated into a device selected from the group consisting of a set top box, music player, video player, entertainment unit, navigation device, communications device, personal digital assistant (PDA), fixed location data unit, and a computer.

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