Switch device and storage unit

Abstract

A switch device includes: a first electrode; a second electrode arranged to face the first electrode; and a switch layer provided between the first electrode and the second electrode. The switch layer includes a first layer containing a chalcogen element, and a second layer containing a high resistance material.

What is claimed is: 
     
         1 . A storage unit comprising:
 a plurality of storage devices arranged in a matrix, respective ones of the storage devices including:
 a first storage electrode, 
 a second storage electrode disposed facing the first storage electrode, 
 an ion source layer disposed between the first storage electrode and the second storage electrode, and containing one or more chalcogen elements selected from tellurium (Te), sulfur (S), and selenium (Se), and 
 a resistance variation layer disposed between the first storage electrode and the second storage electrode; and 
   a plurality of switch devices arranged corresponding to the plurality of storage devices, respective ones of the switch devices including:
 a first switch electrode, 
 a second switch electrode disposed facing the second switch electrode, and 
 a switch layer disposed between the first switch electrode and the second switch electrode. 
   
     
     
         2 . The storage unit according to  claim 1 , further comprising:
 a plurality of word lines extending in a first direction; and   a plurality of bit lines extending in a second direction crossing the first direction,   wherein respective ones of the plurality of storage devices and corresponding ones of the plurality of switch devices are disposed at intersections between the plurality of word lines and the plurality of bit lines.   
     
     
         3 . The storage unit according to  claim 1 , wherein, for the respective ones of the plurality of storage devices and the corresponding ones of the plurality of switch devices, the first storage electrode is the same as the first switch electrode. 
     
     
         4 . The storage unit according to  claim 3 , wherein, for the respective ones of the plurality of storage devices and the corresponding ones of the plurality of switch devices, the second storage electrode is the same as the second switch electrode. 
     
     
         5 . The storage unit according to  claim 3 , wherein, for the respective ones of the plurality of storage devices and the corresponding ones of the plurality of switch devices, the second storage electrode, one of the ion storage layer and the resistance variation layer, the other of the ion storage layer and the resistance variation layer, the first storage electrode, the switch layer, and the second switch electrode are arranged in this order. 
     
     
         6 . The storage unit according to  claim 1 , wherein, for the respective ones of the plurality of storage devices:
 the resistance variation layer includes a first resistance variation sublayer and a second resistance variation sublayer, and   the ion source layer is arranged between the first resistance variation sublayer and the second resistance variation sublayer.   
     
     
         7 . The storage unit according to  claim 1 , wherein, for the respective ones of the plurality of storage devices, the resistance variation layer includes a transition metal oxide. 
     
     
         8 . The storage unit according to  claim 1 , wherein, for the respective ones of the plurality of storage devices, a thickness of the resistance variation layer is about 1 nm to about 10 nm. 
     
     
         9 . The storage unit according to  claim 1 , wherein, for the respective ones of the plurality of switch devices, a switching threshold voltage is equal to or higher than 1 V. 
     
     
         10 . The storage unit according to  claim 9 , wherein, for the respective ones of the plurality of switch devices, a switching threshold voltage is equal to or higher than 1.5 V. 
     
     
         11 . A non-volatile memory comprising:
 a plurality of storage devices arranged in a matrix, respective ones of the storage devices including:
 a first storage electrode, 
 a second storage electrode disposed facing the first storage electrode, 
 an ion source layer disposed between the first storage electrode and the second storage electrode, and containing one or more chalcogen elements selected from tellurium (Te), sulfur (S), and selenium (Se), and 
 a resistance variation layer disposed between the first storage electrode and the second storage electrode; and 
   a plurality of switch devices arranged corresponding to the plurality of storage devices, respective ones of the switch devices including:
 a first switch electrode, 
 a second switch electrode disposed facing the second switch electrode, and 
 a switch layer disposed between the first switch electrode and the second switch electrode. 
   
     
     
         12 . The non-volatile memory according to  claim 11 , further comprising:
 a plurality of word lines extending in a first direction; and   a plurality of bit lines extending in a second direction crossing the first direction,   wherein respective ones of the plurality of storage devices and corresponding ones of the plurality of switch devices are disposed at intersections between the plurality of word lines and the plurality of bit lines.   
     
     
         13 . The non-volatile memory according to  claim 11 , wherein, for the respective ones of the plurality of storage devices and the corresponding ones of the plurality of switch devices, the first storage electrode is the same as the first switch electrode. 
     
     
         14 . The non-volatile memory according to  claim 13 , wherein, for the respective ones of the plurality of storage devices and the corresponding ones of the plurality of switch devices, the second storage electrode is the same as the second switch electrode. 
     
     
         15 . The non-volatile memory according to  claim 13 , wherein, for the respective ones of the plurality of storage devices and the corresponding ones of the plurality of switch devices, the second storage electrode, one of the ion storage layer and the resistance variation layer, the other of the ion storage layer and the resistance variation layer, the first storage electrode, the switch layer, and the second switch electrode are arranged in this order. 
     
     
         16 . The non-volatile memory according to  claim 11 , wherein, for the respective ones of the plurality of storage devices:
 the resistance variation layer includes a first resistance variation sublayer and a second resistance variation sublayer, and   the ion source layer is arranged between the first resistance variation sublayer and the second resistance variation sublayer.   
     
     
         17 . The non-volatile memory according to  claim 11 , wherein, for the respective ones of the plurality of storage devices, the resistance variation layer includes a transition metal oxide. 
     
     
         18 . The non-volatile memory according to  claim 11 , wherein, for the respective ones of the plurality of storage devices, a thickness of the resistance variation layer is about 1 nm to about 10 nm. 
     
     
         19 . The non-volatile memory according to  claim 11 , wherein, for the respective ones of the plurality of switch devices, a switching threshold voltage is equal to or higher than 1 V. 
     
     
         20 . The non-volatile memory according to  claim 19 , wherein, for the respective ones of the plurality of switch devices, a switching threshold voltage is equal to or higher than 1.5 V.