Hemt having heavily doped n-type regions and process of forming the same

Abstract

A HEMT made of nitride semiconductor materials and a process of forming the same are disclosed, where the HEMT has n-type regions beneath the source and drain electrodes with remarkably increased carrier concentration. The HEMT provides the n-type regions made of at least one of epitaxially grown ZnO layer and MgZnO layer each doped with at least aluminum and gallium with density higher than 1×10 20 cm −3 . The process of forming the HEMT includes steps of forming recesses by dry-etching, epitaxially growing n-type layer, removing surplus n-type layer except within the recesses by dry-etching using hydrocarbon, and forming the electrodes on the n-type layer.

I claim: 
     
         1 . A high electron mobility transistor (HEMT) made of nitride semiconductor materials, comprising:
 a channel layer made of nitride semiconductor material;   a barrier layer made of nitride semiconductor material having bandgap energy greater than that of the channel layer;   n-type regions made of at least one of zinc oxide (ZnO) and magnesium zinc oxide (MgZnO), the n-type regions being doped with at least aluminum (Al) and gallium (Ga); and   source and drain electrodes provided on the n-type regions, respectively, and a gate electrode provided on the barrier layer.   
     
     
         2 . The HEMT of  claim 1 ,
 wherein the n-type regions have an electron concentration greater than 1×10 20  cm −3 .   
     
     
         3 . The HEMT of  claim 2 ,
 wherein the n-type regions dope have doping density of at least Al and Ga greater than 2×10 20  cm −3 .   
     
     
         4 . The HEMT of  claim 1 ,
 wherein the channel layer is made of gallium nitride (GaN).   
     
     
         5 . The HEMT of  claim 4 ,
 wherein the barrier layer is made of aluminum gallium nitride (AlGaN) or indium aluminum nitride (InAlN).   
     
     
         6 . The HEMT of  claim 5 ,
 wherein the barrier layer has a thickness of 5 to 20 nm.   
     
     
         7 . The HEMT of  claim 5 ,
 wherein the n-type regions have a depth of 40 to 200 nm.   
     
     
         8 . The HEMT of  claim 1 ,
 further including a cap layer made of nitride semiconductor material provided the barrier layer, the gate electrode being provided on the cap layer.   
     
     
         9 . A process of forming a high electron mobility transistor (HEMT) made of nitride semiconductor materials, comprising steps of:
 forming a semiconductor stack on a substrate by epitaxially growing the nitride semiconductor materials;   forming recesses by etching portions of the semiconductor stack;   epitaxially growing n-type film made of at least one of zinc oxide (ZnO) and magnesium zinc oxide (MgZnO) each doped with at least one of aluminum (Al) and gallium (Ga);   forming n-type regions by partially removing the n-type film except within the recesses by a dry-etching using hydrocarbon; and   forming source and drain electrodes on the n-type regions.   
     
     
         10 . The process of  claim 9 ,
 wherein the step of forming the recesses includes a step of etching the semiconductor stack by a depth at least 80 nm.   
     
     
         11 . The process of  claim 9 ,
 wherein the step of growing the n-type film includes a step of growing the n-type film within oxygen plasma at a temperature lower than 700° C. using a solidified zinc (Zn).   
     
     
         12 . The process of  claim 11 ,
 wherein the step of growing the n-type ZnO film is carried out at a temperature of 600° C.   
     
     
         13 . The process of  claim 11 ,
 further including a step of, after growing the n-type film but before partially removing the n-type film, thermally treating the n-type film at a temperature not higher than 800° C.   
     
     
         14 . The process of  claim 13 ,
 wherein the step of thermally treating the n-type film is carried out for 30 minutes.   
     
     
         15 . The process of  claim 9 ,
 wherein the step of partially removing the n-type film is carried out using methane (CH 4 ).   
     
     
         16 . The process of  claim 9 ,
 wherein the step of forming the semiconductor stack includes steps of:   epitaxially growing a buffer layer on the substrate;   epitaxially growing a channel layer made of gallium nitride at a temperature of 1000 to 1100° C. on the buffer layer; and   epitaxially growing a barrier layer made of aluminum gallium nitride (AlGaN) at a temperature of 1000 to 1100° C.   
     
     
         17 . The process of  claim 9 ,
 wherein the step of forming the semiconductor stack includes steps of:   epitaxially growing a buffer layer on the substrate;   epitaxially growing a channel layer made of gallium nitride (GaN) at a temperature of 1000 to 1100° C. on the buffer layer; and   epitaxially growing a barrier layer made of indium aluminum nitride (InAlN) at a temperature of 650 to 850° C.   
     
     
         18 . The process of  claim 17 ,
 wherein the step of forming the semiconductor stack further including a step of growing a cap layer made of GaN on the barrier layer.