US2017092606A1PendingUtilityA1

Semiconductor device and method of manufacturing the same

Assignee: CYPRESS SEMICONDUCTOR CORPPriority: Feb 28, 2007Filed: Oct 28, 2016Published: Mar 30, 2017
Est. expiryFeb 28, 2027(~0.6 yrs left)· nominal 20-yr term from priority
H10W 74/142H10W 72/0198H10W 70/099H10W 72/073H10W 72/874H10W 72/9413H10W 70/09H10W 70/60H10W 72/241H10W 90/734H10P 72/7424H10P 72/74H10W 74/019H10W 74/111H10W 74/47H10W 74/01H10W 72/20H10W 72/019H10W 70/699H10W 70/611H10W 70/65H10W 72/90H01L 2924/01079H01L 21/56H01L 24/17H01L 2224/02333H01L 23/293H01L 23/3107H01L 2924/01029H01L 24/03H01L 2924/01047H01L 24/08
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Claims

Abstract

A semiconductor device includes a semiconductor chip, a bump contact, and encapsulating layer, an insulating layer and a connection terminal.

Claims

exact text as granted — not AI-modified
1 - 20 . (canceled) 
     
     
         21 . A package, comprising:
 a substrate;   a semiconductor chip comprising a first surface adjacent to the substrate and a second surface on the opposite side of the semiconductor chip from the first surface, wherein the semiconductor chip comprises a plurality of contacts disposed on the second surface;   an encapsulating layer disposed over the second surface of the semiconductor chip and over the plurality of contacts;   an insulating layer disposed over the encapsulating layer; and   a plurality of connection terminals disposed in the insulating layer.   
     
     
         22 . The package of  claim 21 , wherein the contacts comprise bump contacts. 
     
     
         23 . The package of  claim 21 , wherein the insulating layer has a third surface adjacent to the encapsulating layer and has a fourth surface on the opposite side of the insulating layer from the encapsulating layer, and wherein the connection terminals extend beyond the fourth surface. 
     
     
         24 . The package of  claim 21 , further comprising a fixing material disposed between the substrate and the first surface of the semiconductor chip. 
     
     
         25 . The package of  claim 21 , wherein the substrate comprises silicon. 
     
     
         26 . The package of  claim 21 , wherein the encapsulating layer comprises epoxy resin. 
     
     
         27 . The package of  claim 21 , wherein the connection terminals comprise gold.

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