Self-aligned gate tie-down contacts with selective etch stop liner

Abstract

A method for forming a gate tie-down includes exposing an active area to form trench contact openings and forming trench contacts therein. An etch stop layer is formed on the trench contacts and on spacers of adjacent gate structures. An interlevel dielectric (ILD) is deposited to fill over the etch stop layer. The ILD and the etch stop layer on one side of the gate structure are opened up to provide an exposed etch stop layer portion. The gate structure is recessed to expose a gate conductor. The exposed etch stop layer portion is removed. A conductive material is deposited to provide a self-aligned contact down to the trench contact on the one side of the gate structure, to form a gate contact down to the gate conductor and to form a horizontal connection within the ILD over the active area between the gate conductor and the self-aligned contact.

1 . A gate tie-down structure, comprising:
 a gate structure including a gate conductor and gate spacers;   trench contacts formed on sides of the gate structure;   an etch stop layer portion formed on a gate spacer on one side of the gate structure and over the trench contact on the one side of the gate structure;   a first interlevel dielectric (ILD) configured to bury the gate structure;   a second interlevel dielectric (ILD) having a thickness and being formed on the first ILD and over the etch stop layer portion;   a self-aligned contact connecting to the trench contact on the other side of the gate structure;   a gate contact connected to the gate conductor; and   a horizontal connection within the thickness of the second ILD formed over an active area and connecting the gate conductor and the self-aligned contact over a gate spacer formed on the other side of the gate structure.   
     
     
         2 . The structure as recited in  claim 1 , wherein the etch stop layer portion prevents shorts between one of the trench contacts and the gate conductor. 
     
     
         3 . The structure as recited in  claim 1 , wherein a spacer of an adjacent gate structure remains intact throughout processing due to a removed etch stop layer portion to prevent shorts between one of the trench contacts and a gate conductor of an adjacent gate structure. 
     
     
         4 . The structure as recited in  claim 1 , wherein the second ILD includes a thickness above a cap layer of adjacent gate structures, and the horizontal connection between the gate conductor and the self-aligned contact is formed within the second ILD thickness. 
     
     
         5 . The structure as recited in  claim 1 , wherein the gate spacer formed on the other side remains to permit contact between the self-aligned contact and the gate contact and to prevent contact between the trench contact and the gate conductor. 
     
     
         6 . The structure as recited in  claim 1 , wherein the etch stop layer portion includes a high-k dielectric material. 
     
     
         7 . The structure as recited in  claim 1 , wherein the structure is formed in the active area to reduce device area.