US2017085614A1PendingUtilityA1

Method for processing multimedia streams

Assignee: INTEL CORPPriority: Dec 22, 2004Filed: Sep 28, 2016Published: Mar 23, 2017
Est. expiryDec 22, 2024(expired)· nominal 20-yr term from priority
H04L 69/22H04N 21/4516H04N 21/442H04N 21/438H04L 69/324H04L 65/602H04L 65/762
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Claims

Abstract

A method, machine readable medium, system, and device are disclosed. In one embodiment the method comprises determining whether one or more components that comprise a multimedia stream require real-time processing, if at least one of the one or more components require real-time processing, assigning the one or more components that require real-time processing to one or more real-time processes, and assigning any remaining components to one or more non-real-time processes.

Claims

exact text as granted — not AI-modified
1 . A device, comprising logic to:
 read a first packet, the first packet one of a plurality of packets comprising a multimedia packet stream, wherein the first packet comprises a plurality of components; and   for each component of the plurality of components within the packet
 determine whether the component requires real-time-processing; 
 assign the component to be processed by a real-time process in response to the component requiring real-time processing; and 
 assign the component to be processed by a non-real-time process in response to the component not requiring real-time processing. 
   
     
     
         2 . The device of  claim 1 , wherein the logic is further operable to
 determine a rate at which the plurality of packets are being received; and   process each component within each packet at least at the rate the packets are being received.   
     
     
         3 . The device of  claim 2 , wherein the logic is further operable to
 unwrap the first packet by separating each of the plurality of components comprising the first packet.   
     
     
         4 . The device of  claim 3 , wherein the logic is further operable to
 assign a priority level to a component, wherein the priority level is calculated based on the importance of the component's information.   
     
     
         5 . The device of  claim 4 , wherein the logic is further operable to
 determine a maximum delay allowable for a first component not requiring real-time processing; and   assign the first component to a process that delivers at least the amount of processing required to process the first component within the maximum allowable delay.   
     
     
         6 . The device of  claim 4 , wherein the logic is further operable to
 process a plurality of the components of the first packet sequentially, wherein the sequence of the components to be processed is in the order of the priority levels per component, a highest priority level component being processed first and a lowest priority level component being processed last.   
     
     
         7 . The device of  claim 6 , wherein the logic is further operable to
 store the stream of packets in real-time on a storage device immediately after packet creation to prevent information loss of one or more low priority level packet components.   
     
     
         8 . The device of  claim 4 , wherein the logic is further operable to:
 omit at least one component of the first packet from being processed.   
     
     
         9 . The device of  claim 4 , wherein the logic is further operable to
 omit a component with the lowest priority level from the first packet.   
     
     
         10 . The device of  claim 9 , wherein the logic is further operable to
 set a maximum number of consecutive packets in the stream with the same omitted component.   
     
     
         11 . The device of  claim 1 , wherein the logic is further operable to:
 determine a first format of the packets in the stream transmitted from a source device;   determine a second format of the packets in the stream required by a destination device;   cause each packet within the stream to directly transmit between the source device and the destination device without processing in response to the first and second formats being equal.   
     
     
         12 . The device of  claim 1 , wherein a process comprises an executable thread on a computing device. 
     
     
         13 . The device of  claim 1 , wherein the logic is further operable to
 assign at least two of the plurality of components within each packet to processes on separate computing devices.   
     
     
         14 . The device of  claim 1 , wherein the logic is further operable to
 assign two or more of the plurality of components to the same process.

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