Surface-mount electronic component

Abstract

A surface-mount chip is formed by a silicon substrate having a front surface and a side. The chip includes a metallization intended to be soldered to an external device. The metallization has a first portion covering at least a portion of the front surface of the substrate and a second portion covering at least a portion of the side of the substrate. A porous silicon region is included in the substrate to separating the second portion of the metallization from the rest of the substrate.

1 . A method, comprising the steps of:
 a) etching an opening from an upper surface of a substrate, said opening defining a portion of a side of a surface mount integrated circuit chip;   b) forming a porous silicon region extending in the substrate from lateral walls of the opening; and   c) forming a metallization configured to be soldered to an external device, said metallization comprising a first portion covering at least a portion of an upper surface of the substrate and extending in a second portion extending over at least a portion of the lateral walls of the opening.   
     
     
         2 . The method of  claim 1 , further comprising, after step c), cutting along a cutting line crossing the opening. 
     
     
         3 . The method of  claim 2 , wherein cutting comprises removing a cutting area having a width smaller than the width of the opening. 
     
     
         4 . The method of  claim 1 , further comprising grinding a lower surface of the substrate. 
     
     
         5 . The method of  claim 4 , wherein, forming the metallization comprises performing an electrochemical deposition step. 
     
     
         6 . A method, comprising:
 forming a blind opening in a semiconductor wafer between two adjacent active areas;   providing a metal contact on the semiconductor wafer at each active area;   converting a portion of the semiconductor wafer at sidewalls of the blind opening to porous silicon;   forming a metallization layer which includes first portions in contact with the metal contacts for the active areas and a second portion which extends between the first portions into the opening and along sidewalls of the opening in contact with the porous silicon; and   splitting the semiconductor wafer by cutting through the opening to separate the semiconductor wafer into a first chip and second chip, said second portion of the metallization layer providing a side electrical contact for each of the first and second chips.   
     
     
         7 . The method of  claim 6 , further comprising grinding a lower surface of the semiconductor wafer prior to splitting. 
     
     
         8 . The method of  claim 6 , wherein, forming the metallization layer comprises performing an electrochemical deposition step. 
     
     
         9 . The method of  claim 6 , further comprising forming an insulating layer on the semiconductor wafer surrounding the metal contacts, said insulating layer covering a portion of the porous silicon at an overlap. 
     
     
         10 . A method, comprising:
 forming an opening in a semiconductor wafer between a first chip area of said semiconductor wafer and a second chip area of said semiconductor wafer, said opening having a depth that is less than a thickness of the semiconductor wafer and having a first sidewall adjacent the first chip area and a second sidewall adjacent the second chip area;   providing a first metal contact on a surface of the semiconductor wafer at the first chip area and providing a second metal contact on the surface of the semiconductor wafer at the second chip area;   converting the first and second sidewalls of the opening to form a first porous silicon sidewall region and second porous silicon sidewall region, respectively;   forming a metal layer that extends between the first and second metal contacts and within the opening to cover the first porous silicon sidewall region and second porous silicon sidewall region; and   cutting through the opening to separate the semiconductor wafer into a first chip including the first chip area and second chip including the second chip area, said cutting further cutting the metal layer in said opening to form therefrom a first side electrical contact for the first chip that extends from the first metal contact to a side edge of the first chip and a second side electrical contact for the second chip that extends from the second metal contact to a side edge of the second chip.   
     
     
         11 . The method of  claim 10 , further comprising thinning the thickness of the semiconductor wafer prior to the step of cutting. 
     
     
         12 . The method of  claim 10 , wherein, forming the metal layer comprises performing an electrochemical deposition step. 
     
     
         13 . The method of  claim 10 , further comprising forming an insulating layer on the semiconductor wafer surrounding the first and second metal contacts, said insulating layer covering a portion of the first and second porous silicon sidewall regions. 
     
     
         14 . The method of  claim 10 , wherein cutting comprises removing a cutting area having a width smaller than a width of the opening between the first and second chip areas.