Adaptive Operation of 3D NAND Memory

Abstract

In a nonvolatile memory block that contains separately-selectable sets of NAND strings, a bit line current sensing unit is configured to sense bit line current for a separately-selectable set of NAND strings of the block. A bit line voltage adjustment unit is configured to apply a first and second bit line voltages to separately-selectable sets of NAND strings that have bit line currents greater and less than the minimum current respectively, the second bit line voltage being greater than the first bit line voltage.

It is claimed: 
     
         1 . A nonvolatile memory system comprising:
 a block that contains a plurality of separately-selectable sets of memory units;   a bit line current sensing unit that is configured to sense bit line current for a separately-selectable set of memory units of the block and to compare the bit line current to a minimum current; and   a bit line voltage adjustment unit that is in communication with the bit line current sensing unit, the bit line voltage adjustment unit configured to apply a first bit line voltage to separately-selectable sets of memory units that have bit line currents greater than the minimum current, and configured to apply a second bit line voltage to separately-selectable sets of memory units that have bit line currents less than the minimum current, the second bit line voltage being greater than the first bit line voltage.