Printed circuit board and manufacturing method thereof

Abstract

A printed circuit board and a manufacturing method thereof are provided. A printed circuit board may include a first insulating layer comprising a photosensitive material on a core layer, a second insulating layer comprising a material comprising a reinforcing material on the first insulating layer, and a cavity formed in the first insulating layer and the second insulating layer.

What is claimed is: 
     
         1 . A printed circuit board, comprising:
 a first insulating layer comprising a photosensitive material on a core layer;   a second insulating layer comprising a reinforcing material on the first insulating layer; and   a cavity formed in the first insulating layer and the second insulating layer.   
     
     
         2 . The printed circuit board of  claim 1 , further comprising a conductive pattern formed on the core layer in the cavity. 
     
     
         3 . The printed circuit board of  claim 1 , wherein the second insulating layer is a prepreg having a copper foil laminated on one surface. 
     
     
         4 . The printed circuit board of  claim 1 , further comprising a solder resist layer on the second insulating layer. 
     
     
         5 . The printed circuit board of  claim 1 , further comprising a surface treatment layer on the conductive pattern. 
     
     
         6 . A method for manufacturing a printed circuit board, the method comprising:
 disposing a first insulating layer comprising a photosensitive material on a core layer;   forming a first cavity in the first insulating layer;   forming a second cavity to correspond to the first cavity in a second insulating layer formed of a material comprising a reinforcing material; and   disposing the second insulating layer on the first insulating layer.   
     
     
         7 . The method of  claim 6 , wherein the disposing the first insulating layer comprises laminating the photosensitive material on the core layer. 
     
     
         8 . The method of  claim 6 , wherein the disposing the second insulating layer comprises laminating the second insulating layer on the first insulating layer. 
     
     
         9 . The method of  claim 6 , wherein the forming the first cavity comprises photo-exposing and chemically removing portions of the first insulating layer. 
     
     
         10 . The method of  claim 6 , further comprising laminating a protection layer configured to cover a conductive pattern inside the first cavity after disposing the first insulating layer on the core layer, wherein the first cavity exposes the conductive pattern formed on the core layer. 
     
     
         11 . The method of  claim 10 , further comprising removing the protection layer after disposing the second insulating layer on the first insulating layer. 
     
     
         12 . The method of  claim 10 , wherein an upper surface height of the protection layer is equal to or less than that of the first insulating layer. 
     
     
         13 . The method of  claim 6 , wherein the second insulating layer is a prepreg having a copper foil laminated on one surface. 
     
     
         14 . The method of  claim 13 , wherein the forming the second cavity comprises punching a portion of the prepreg material. 
     
     
         15 . The method of  claim 6 , wherein a portion of the second insulating layer is greater than an area of the first cavity. 
     
     
         16 . The method of  claim 15 , wherein the portion of the second insulating layer greater than the area of the first cavity is punched is laminated. 
     
     
         17 . The method of  claim 6 , further comprising forming a solder resist layer on the second insulating layer. 
     
     
         18 . The method of  claim 10 , further comprising forming a surface treatment layer on the conductive pattern. 
     
     
         19 . A printed circuit board, comprising:
 a first insulating layer disposed on a core layer;   a second insulating layer disposed on the first insulating layer; and   a cavity in the first insulating layer and the second insulating layer, the cavity exposing a conductive pattern present on the core layer,   wherein the cavity is configured to enable an external chip to contact the conductive pattern.   
     
     
         20 . The printed circuit board of  claim 19 , wherein the first insulating layer comprises a photosensitive material that is non-reactive with dry film resist (DFR) film, and the second insulating layer comprises a reinforcing material.