Magnetic memory

Abstract

A magnetic memory according to an embodiment includes: a conductive nonmagnetic layer including a first terminal, a second terminal, and a region between the first terminal and the second terminal; a magnetoresistive element including: a first magnetic layer; a second magnetic layer disposed between the region and the first magnetic layer; and a nonmagnetic intermediate layer disposed between the first magnetic layer and the second magnetic layer; a transistor including a third terminal, a fourth terminal, and a control terminal, the third terminal being electrically connected to the first terminal; a first wiring electrically connected to the first magnetic layer and the fourth terminal; a second wiring electrically connected to the control terminal; and a third wiring electrically connected to the second terminal.

1 . A magnetic memory comprising:
 a conductive nonmagnetic layer including a first terminal, a second terminal, and a region between the first terminal and the second terminal;   a magnetoresistive element including: a first magnetic layer; a second magnetic layer disposed between the region and the first magnetic layer; and a nonmagnetic intermediate layer disposed between the first magnetic layer and the second magnetic layer;   a transistor including a third terminal, a fourth terminal, and a control terminal, the third terminal being electrically connected to the first terminal;   a first wiring electrically connected to the first magnetic layer and the fourth terminal;   a second wiring electrically connected to the control terminal; and   a third wiring electrically connected to the second terminal.   
     
     
         2 . The memory according to  claim 1 , further comprising
 a diode provided between the first wiring and the first magnetic layer, the diode including an anode electrically connected to the first wiring and a cathode electrically connected to the first magnetic layer.   
     
     
         3 . The memory according to  claim 2 , wherein the magnetoresistive element further includes a third magnetic layer between the cathode of the diode and the first magnetic layer. 
     
     
         4 . The memory according to  claim 1 , further comprising:
 a first write/read circuit electrically connected to the first wiring; and   a second write/read circuit electrically connected to the second wiring and the third wiring, wherein   the second write/read circuit turns on the transistor, and   the first write/read circuit and the second write/read circuit apply a write current between the first wiring and the third wiring via the conductive nonmagnetic layer.   
     
     
         5 . The memory according to  claim 4 , wherein
 the second write/read circuit turns off the transistor, and   the first write/read circuit and the second write/read circuit apply a read current between the first wiring and the third wiring via the magnetoresistive element.   
     
     
         6 . The memory according to  claim 1 , further comprising:
 a first write/read circuit electrically connected to the first wiring and the second wiring; and   a second write/read circuit electrically connected to the third wiring, wherein   the first write/read circuit turns on the transistor, and   the first write/read circuit and the second write/read circuit apply a write current between the first wiring and the third wiring via the conductive nonmagnetic layer.   
     
     
         7 . The memory according to  claim 6 , wherein
 the first write/read circuit turns off the transistor, and   the first write/read circuit and the second write/read circuit apply a read current between the first wiring and the third wiring via the magnetoresistive element.   
     
     
         8 . The memory according to  claim 1 , wherein the conductive nonmagnetic layer contains at least one element of Hf, Ta, W, Re, Ir, Pt, Au, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Ti, V, Cr, Mn, Fe, Co, Ni, or Cu. 
     
     
         9 . The magnetic memory according to  claim 8 , wherein the conductive nonmagnetic layer further contains at least one element of B, C, N,  0 , Si, P, or Bi. 
     
     
         10 . The memory according to  claim 1 , wherein the second magnetic layer contains at least one element of Fe, Co, or Ni. 
     
     
         11 . The memory according to  claim 10 , wherein the second magnetic layer further contains at least one element of B, C, N, O, Si, or P. 
     
     
         12 . The memory according to  claim 1 , wherein the first magnetic layer contains a magnetic material having at least one of a greater coercive force or a greater magnetic anisotropy energy than the second magnetic layer. 
     
     
         13 . The memory according to  claim 1 , wherein the nonmagnetic intermediate layer contains oxygen and at least one element of Mg or Al. 
     
     
         14 . A magnetic memory comprising:
 a transistor including: a first and second regions that are conductive and disposed at a distance from each other in a semiconductor layer; a gate disposed above a third region of the semiconductor layer, the third region being located between the first region and the second region; and an insulating layer disposed between the third region and the gate;   a conductive nonmagnetic layer disposed above the transistor;   a first wiring disposed above the conductive nonmagnetic layer;   a magnetoresistive element disposed between the conductive nonmagnetic layer and the first wiring, the magnetoresistive element including: a first magnetic layer electrically connected to the first wiring; a second magnetic layer disposed between the conductive nonmagnetic layer and the first magnetic layer; and a nonmagnetic intermediate layer disposed between the first magnetic layer and the second magnetic layer;   a first conductive portion electrically connecting the first region and the conductive nonmagnetic layer to each other;   a second conductive portion electrically connecting the second region and the first wiring to each other;   a second wiring electrically connected to the gate of the transistor; and   a third wiring electrically connected to the conductive nonmagnetic layer.   
     
     
         15 . The memory according to  claim 14 , further comprising
 a diode provided between the first wiring and the first magnetic layer, the diode including an anode electrically connected to the first wiring and a cathode electrically connected to the first magnetic layer.   
     
     
         16 . The memory according to  claim 15 , wherein the magnetoresistive element further includes a third magnetic layer between the cathode of the diode and the first magnetic layer. 
     
     
         17 . The memory according to  claim 14 , further comprising:
 a first write/read circuit electrically connected to the first wiring; and   a second write/read circuit electrically connected to the second wiring and the third wiring, wherein   the second write/read circuit turns on the transistor, and   the first write/read circuit and the second write/read circuit apply a write current between the first wiring and the third wiring via the conductive nonmagnetic layer.   
     
     
         18 . The memory according to  claim 17 , wherein
 the second write/read circuit turns off the transistor, and   the first write/read circuit and the second write/read circuit apply a read current between the first wiring and the third wiring via the magnetoresistive element.   
     
     
         19 . The memory according to  claim 14 , further comprising:
 a first write/read circuit electrically connected to the first wiring and the second wiring; and   a second write/read circuit electrically connected to the third wiring, wherein   the first write/read circuit turns on the transistor, and   the first write/read circuit and the second write/read circuit apply a write current between the first wiring and the third wiring via the conductive nonmagnetic layer.   
     
     
         20 . The memory according to  claim 19 , wherein
 the first write/read circuit turns off the transistor, and   the first write/read circuit and the second write/read circuit apply a read current between the first wiring and the third wiring via the magnetoresistive element.   
     
     
         21 . The memory according to  claim 14 , wherein the conductive nonmagnetic layer contains at least one element of Hf, Ta, W, Re, Ir, Pt, Au, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Ti, V, Cr, Mn, Fe, Co, Ni, or Cu. 
     
     
         22 . The magnetic memory according to  claim 21 , wherein the conductive nonmagnetic layer further contains at least one element of B, C, N, O, Si, P, or Bi. 
     
     
         23 . The memory according to  claim 14 , wherein the second magnetic layer contains at least one element of Fe, Co, or Ni. 
     
     
         24 . The memory according to  claim 23 , wherein the second magnetic layer further contains at least one element of B, C, N, O, Si, or P. 
     
     
         25 . The memory according to  claim 14 , wherein the first magnetic layer contains a magnetic material having at least one of a greater coercive force or a greater magnetic anisotropy energy than the second magnetic layer. 
     
     
         26 . The memory according to  claim 14 , wherein the nonmagnetic intermediate layer contains oxygen and at least one element of Mg or Al.