Storage device and interrupt generation method thereof

Abstract

An interrupt generation method of a storage device includes executing a command provided by a host, writing a completion entry in a completion queue of the host upon completing execution of the command, and issuing an interrupt corresponding to the completion entry to the host in response to at least one of a first interrupt generation condition, a second interrupt generation condition, and a third interrupt generation condition being satisfied. The first interrupt generation condition is satisfied when a difference between a tail pointer and a head pointer of the completion queue is equal to a first mismatch value. The second interrupt generation condition is satisfied when the difference between the tail pointer and the head pointer is at least equal to an aggregation threshold. The third interrupt generation condition is satisfied when an amount of time that has elapsed since a previous interrupt was issued exceeds a reference time.

What is claimed is: 
     
         1 . An interrupt generation method of a storage device, the method comprising:
 executing a command provided by a host;   writing a completion entry in a completion queue of the host upon completing execution of the command; and   issuing an interrupt corresponding to the completion entry to the host in response to at least one of a first interrupt generation condition, a second interrupt generation condition, and a third interrupt generation condition being satisfied,   wherein the first interrupt generation condition is satisfied when a difference between a tail pointer and a head pointer of the completion queue is equal to a first mismatch value, the second interrupt generation condition is satisfied when the difference between the tail pointer and the head pointer is at least equal to an aggregation threshold, and the third interrupt generation condition is satisfied when an amount of time that has elapsed since a previous interrupt was issued exceeds a reference time.   
     
     
         2 . The method of  claim 1 , further comprising:
 receiving the head pointer from the host.   
     
     
         3 . The method of  claim 2 , further comprising:
 calculating the difference between the tail pointer and the head pointer with reference to the received head pointer and an index of the tail pointer managed at the storage device.   
     
     
         4 . The method of  claim 2 , wherein the first mismatch value corresponds to a point in time that index values of the head and tail pointers do not match for a first time. 
     
     
         5 . The method of  claim 1 , wherein the storage device is a solid state drive (SSD). 
     
     
         6 . The method of  claim 1 , wherein the storage device comprises a three-dimensional memory array. 
     
     
         7 . The method of  claim 1 , wherein the storage device communicates with the host based on at least one of a Universal Serial Bus (USB) interface, a Small Computer System Interface (SCSI), a Peripheral Component Express (PCI Express) interface, an Advanced Technology Attachment (ATA) interface, a Parallel ATA (PATA) interface, a Serial ATA (SATA) interface, and a Serial Attached SCSI (SAS) interface. 
     
     
         8 . A storage device, comprising:
 a nonvolatile memory device; and   a storage controller configured to control the nonvolatile memory device,   wherein the storage controller executes a command provided by a host, sends a completion entry to the host upon executing the command, and issues an interrupt corresponding to the completion entry to the host,   wherein the storage controller issues the interrupt to the host in response to at least one of a first interrupt generation condition, a second interrupt generation condition, and a third interrupt generation condition being satisfied,   wherein the first interrupt generation condition is satisfied when a difference between a tail pointer and a head pointer of a completion queue of the host in which the completion entry is stored is equal to a first mismatch value, the second interrupt generation condition is satisfied when the difference between the tail pointer and the head pointer is at least equal to an aggregation threshold, and the third interrupt generation condition is satisfied when an amount of time that has elapsed since a previous interrupt was issued exceeds a reference time.   
     
     
         9 . The method of  claim 8 , wherein the storage controller comprises:
 a host interface configured to receive the head pointer from the host and transfer the interrupt to the host.   
     
     
         10 . The method of  claim 9 , wherein the host interface comprises:
 a doorbell register configured to store the head pointer; and   an interrupt table configured to designate the interrupt to be issued.   
     
     
         11 . The method of  claim 10 , wherein the storage controller calculates the difference between the tail pointer and the head pointer with reference to the head pointer stored in the doorbell register. 
     
     
         12 . The method of  claim 9 , wherein the host interface communicates with the host based on at least one of a Universal Serial Bus (USB) interface, a Small Computer System Interface (SCSI), a Peripheral Component Express (PCI Express) interface, an Advanced Technology Attachment (ATA) interface, a Parallel ATA (PATA) interface, a Serial ATA (SATA) interface, and a Serial Attached SCSI (SAS) interface. 
     
     
         13 . The method of  claim 8 , wherein the nonvolatile memory device comprises a three-dimensional memory array. 
     
     
         14 . An interrupt issuing method of a solid state drive (SSD), the method comprising:
 writing a completion entry at a completion queue of a host;   determining whether to issue an interrupt corresponding to the completion queue based on a number of completion entries accumulated in the completion queue or an amount of time that has elapsed since a previous interrupt was issued; and   sending the interrupt to the host based on a result of the determination.   
     
     
         15 . The method of  claim 14 , wherein the solid state drive postpones issuing the interrupt until the number of the accumulated completion entries reaches a threshold. 
     
     
         16 . The method of  claim 14 , wherein the solid state drive issues the interrupt when the number of the accumulated completion entries is 1. 
     
     
         17 . The method of  claim 14 , wherein the solid state drive communicates with the host via a nonvolatile memory express (NVMe) interface. 
     
     
         18 . The method of  claim 14 , further comprising:
 executing a command fetched from the host before the completion entry is written at the completion queue of the host.   
     
     
         19 . The method of  claim 18 , further comprising:
 receiving a position of a tail pointer of the completion queue from the host.   
     
     
         20 . An interrupt issuing method of a solid state drive (SSD), the method comprising:
 writing a completion entry at a completion queue of a host;   determining whether to issue an interrupt corresponding to the completion queue based on at least one of a first interrupt generation condition indicating whether a difference between a tail pointer and a head pointer of the completion queue is equal to a first mismatch value, a second interrupt generation condition indicating whether the difference between the tail pointer and the head pointer is at least equal to an aggregation threshold, and a third interrupt generation condition indicating whether an amount of time that has elapsed since a previous interrupt was issued exceeds a reference time; and   sending the interrupt to the host based on a result of the determination.