Image sensor device

Abstract

Image sensor devices of related art have a problem that a circuit area increases. According to one embodiment, an image sensor device includes a read-out capacitor ( 28 ) that accumulates first pixel information to be output from a photodiode which is exposed to light with a first exposure time. In addition to the first pixel information, second pixel information to be output from the photodiode which is exposed to light with a second exposure time longer than the first exposure time is generated. After the first pixel information and the second pixel information are read out separately, the two pieces of pixel information are synthesized to thereby generate output image information.

What is claimed is: 
     
         1 . An image sensor device comprising:
 a plurality of pixel cells arranged in a matrix in a pixel array; and   a timing control circuit that controls read-out of pixel information from the plurality of pixel cells, wherein   the plurality of pixel cells each include:
 a photodiode; 
 a transfer transistor provided between the photodiode and a floating diffusion; 
 a node reset transistor provided between a power supply terminal and the floating diffusion; 
 a read-out capacitor whose one end is connected to the power supply terminal; 
 a capacitor reset transistor provided between another end of the read-out capacitor and the floating diffusion; 
 an amplification transistor that amplifies a voltage generated based on electric charges accumulated in the floating diffusion; and 
 a selection transistor provided between the amplification transistor and a read-out line, and 
   when the timing control circuit operates in a first operation mode to generate output image information by synthesizing results obtained by performing an exposure on the photodiode a plurality of times with different exposure times, the timing control circuit controls the pixel cells in such a manner that:   the transfer transistor is switched to a cut-off state and the photodiode is exposed to light with a first exposure time, and then the capacitor reset transistor and the transfer transistor are switched to a conductive state to cause electric charges accumulated in the photodiode to be accumulated in the read-out capacitor;   the capacitor reset transistor and the transfer transistor are switched from the conductive state to the cut-off state and the photodiode is further exposed to light with a second exposure time;   a first read-out operation for switching the selection transistor and the capacitor reset transistor from the cut-off state to the conductive state during a period of the second exposure time and for outputting first pixel information accumulated in the read-out capacitor to the read-out line is performed; and   a second read-out operation for switching the capacitor reset transistor to the cut-off state after a lapse of the second exposure time and for switching the transfer transistor and the selection transistor to the conductive state to cause second pixel information to be output to the read-out line from the photodiode is performed.   
     
     
         2 . The image sensor device according to  claim 1 , wherein the read-out capacitor is formed using a wiring capacitance of a line connected to a diffusion layer of the capacitor reset transistor. 
     
     
         3 . The image sensor device according to  claim 1 , wherein the timing control circuit controls the pixel cells in such a manner that the first read-out operation and the second read-out operation are performed at different timings for each row. 
     
     
         4 . The image sensor device according to  claim 1 , wherein when the timing control circuit operates in a second operation mode to generate the output image information based on a result of simultaneously performing an exposure on the photodiodes belonging to a plurality of rows, the timing control circuit controls the pixel cells in such a manner that:
 the capacitor reset transistors of the plurality of pixel cells are switched from the cut-off state to the conductive state after the exposure is completed, and pixel information output from the photodiodes is held in the read-out capacitor; and   the selection transistor and the capacitor reset transistor are sequentially switched to the conductive state for each row and the pixel information held in the read-out capacitor is read out.   
     
     
         5 . The image sensor device according to  claim 1 , wherein when the timing control circuit operates in a third operation mode to generate the output image information based on a result of performing a one-time exposure on the photodiodes by sequentially switching rows of the photodiodes to be exposed to light, the timing control circuit controls the pixel cells in such a manner that the selection transistor and the transfer transistor are switched to the conductive state, while the capacitor reset transistor is maintained in the cut-off state after the exposure is completed, and pixel information output from the photodiodes is output to the read-out line. 
     
     
         6 . The image sensor device according to  claim 1 , wherein
 the photodiode includes a first photodiode and a second photodiode,   the transfer transistor includes a first transfer transistor and a second transfer transistor,   the read-out capacitor includes a first read-out capacitor and a second read-out capacitor,   the capacitor reset transistor includes a first capacitor reset transistor and a second capacitor reset transistor,   the first transfer transistor is provided between the first photodiode and the floating diffusion,   the second transfer transistor is provided between the second photodiode and the floating diffusion,   one end of the first read-out capacitor is connected to the power supply terminal, and another end of the first read-out capacitor is connected to the floating diffusion via the first capacitor reset transistor, and   one end of the second read-out capacitor is connected to the power supply terminal, and another end of the second read-out capacitor is connected to the floating diffusion via the second capacitor reset transistor.   
     
     
         7 . The image sensor device according to  claim 6 , wherein the timing control circuit controls the pixel cells in such a manner that the first photodiode and the second photodiode are exposed to light during a period in which at least exposure start timings are different from each other, and pieces of image information output from the first photodiode and the second photodiode at different timings are respectively held in the first read-out capacitor and the second read-out capacitor. 
     
     
         8 . The image sensor device according to  claim 1 , wherein
 the photodiode includes a first photodiode and a second photodiode,   the transfer transistor includes a first transfer transistor and a second transfer transistor,   the first transfer transistor is provided between the first photodiode and the floating diffusion, and   the second transfer transistor is provided between the second photodiode and the floating diffusion.   
     
     
         9 . The image sensor device according to  claim 8 , wherein in the first operation mode, the timing control circuit controls the pixel cells in such a manner that when pixel information output from one of the first and second photodiodes exposed to light with the first exposure time in the pixel cells belonging to a first row is accumulated in the read-out capacitor as the first pixel information, pixel information output from the other one of the first and second photodiodes exposed to light with the first exposure time in the pixel cells belonging to a second row adjacent to the first row is accumulated in the read-out capacitor as the first pixel information. 
     
     
         10 . The image sensor device according to  claim 9 , wherein the timing control circuit switches the photodiodes to output pixel information to be held in the read-out capacitor for each frame. 
     
     
         11 . The image sensor device according to  claim 9 , further comprising an image generation unit that generates the output image information by synthesizing the first pixel information with the second pixel information,
 wherein assuming that n represents a row number of a row in which the pixel cells are arranged, the image generation unit generates the output image information by complementing pixel information output from the second photodiode included in the pixel cells in an n-th row by pixel information output from the second photodiode included in the pixel cells arranged in an (n−1)-th row, and the image generation unit generates the output image information by complementing pixel information output from the first photodiode included in the pixel cells in an (n+1)-th row by pixel information output from the first photodiode included in the pixel cells in the n-th row.   
     
     
         12 . The image sensor device according to  claim 8 , wherein when the timing control circuit operates in the second operation mode to generate the output image information based on a result of simultaneously performing an exposure on the photodiodes belonging to a plurality of rows, assuming that n represents a row number of a row in which the pixel cells are arranged, the timing control circuit causes one of the first and second photodiodes in the pixel cells in an n-th row to be exposed to light, and causes the other one of the first and second photodiodes in the pixel cells in an (n+1)-th row to be exposed to light. 
     
     
         13 . The image sensor device according to  claim 9 , further comprising an image generation unit that generates the output image information by synthesizing the first pixel information with the second pixel information,
 wherein assuming that n represents a row number of a row in which the pixel cells are arranged, the image generation unit generates the output image information in such a manner that pixel information output from an invalid photodiode for which no pixel information is held in the read-out capacitor in the pixel cells in the n-th row is complemented by pixel information output from a photodiode corresponding to the invalid photodiode.