Method and structure for forming finfet cmos with dual doped sti regions

Abstract

A method of making a semiconductor device includes forming a first fin of a first transistor in a substrate; forming a second fin of a second transistor in the substrate; disposing a first doped oxide layer including a first dopant onto the first fin and the second fin, the first dopant being an n-type dopant or a p-type dopant; disposing a mask over the first fin and removing the first doped oxide layer from the second fin; removing the mask and disposing a second doped oxide layer onto the first doped oxide layer over the first doped oxide layer covering the first fin and directly onto the second fin, the second doped oxide layer including an n-type dopant or a p-type dopant that is different than the first dopant; and annealing to drive in the first dopant into a portion of the first fin and the second dopant into a portion of the second fin.

What is claimed is: 
     
         1 . A method of making a semiconductor device, the method comprising:
 forming a first fin of a first transistor in a substrate;   forming a second fin of a second transistor in the substrate;   disposing a first doped oxide layer comprising a first dopant onto the first fin and the second fin, the first dopant being an n-type dopant or a p-type dopant;   disposing a mask over the first fin and removing the first doped oxide layer from the second fin;   removing the mask and disposing a second doped oxide layer onto the first doped oxide layer over the first fin and directly onto the second fin, the second doped oxide layer comprising an n-type dopant or a p-type dopant that is different than the first dopant;   annealing to drive in the first dopant into a portion of the first fin and the second dopant into a portion of the second fin;   etching to remove the second doped oxide layer;   depositing an oxide between the first fin and the second fin; and   forming a first gate on the first fin and a second gate on the second fin.   
     
     
         2 . The method of  claim 1 , wherein the first doped oxide spacer comprises the first doped oxide layer. 
     
     
         3 . The method of  claim 2 , wherein the second doped oxide spacer comprises the second doped oxide layer. 
     
     
         4 . The method of  claim 1 , wherein annealing drives the first dopant into the substrate to form a doped substrate region. 
     
     
         5 . The method of  claim 4 , wherein annealing drives the second dopant into the substrate to form a doped substrate region. 
     
     
         6 . The method of  claim 1 , wherein etching to remove the second doped oxide spacer is a wet etch process. 
     
     
         7 . The method of  claim 1 , wherein the oxide deposited between the first fin and the second fin after annealing is an undoped oxide. 
     
     
         8 . The method of  claim 1 , wherein etching to remove the second doped oxide layer substantially completely removes the second doped oxide layer. 
     
     
         9 . The method of  claim 1 , wherein the first fin and the second fin further comprise a hard mask cap. 
     
     
         10 . The method of  claim 9 , wherein the first fin and the second fin further comprise a sidewall spacer. 
     
     
         11 . A method of making a semiconductor device, the method comprising:
 forming a first fin of a first transistor in a substrate;   forming a second fin of a second transistor in the substrate;   disposing a first doped oxide layer comprising a first dopant onto the first fin and the second fin, the first dopant being an n-type dopant or a p-type dopant;   disposing a mask over the first fin and removing the first doped oxide layer from the second fin;   removing the mask and disposing a second doped oxide layer onto the first doped oxide layer over the first fin and directly onto the second fin, the second doped oxide layer comprising an n-type dopant or a p-type dopant that is different than the first dopant;   annealing to drive in the first dopant into a portion of the first fin and the second dopant into a portion of the second fin;   etching to remove the second doped oxide layer;   depositing an oxide between the first fin and the second fin;   recessing the oxide; and   forming a first gate on the first fin and a second gate on the second fin.   
     
     
         12 . The method of  claim 11 , wherein the first doped oxide spacer comprises the first doped oxide layer. 
     
     
         13 . The method of  claim 12 , wherein the second doped oxide spacer comprises the second doped oxide layer. 
     
     
         14 . The method of  claim 11 , wherein annealing drives the first dopant into the substrate to form a doped substrate region. 
     
     
         15 . The method of  claim 14 , wherein annealing drives the second dopant into the substrate to form a doped substrate region. 
     
     
         16 . The method of  claim 11 , wherein etching to remove the second doped oxide spacer is a wet etch process. 
     
     
         17 . The method of  claim 11 , wherein the oxide deposited between the first fin and the second fin after annealing is an undoped oxide. 
     
     
         18 . The method of  claim 11 , wherein etching to remove the second doped oxide layer substantially completely removes the second doped oxide layer. 
     
     
         19 . The method of  claim 11 , wherein the first fin and the second fin further comprise a hard mask cap. 
     
     
         20 . The method of  claim 19 , wherein the first fin and the second fin further comprise a sidewall spacer.