Imager Arrays Including an M x N Array of Focal Planes in which Different Types of Focal Planes are Distributed Around a Reference Focal Plane

Abstract

Architectures for imager arrays configured for use in array cameras in accordance with embodiments of the invention are described. One embodiment of the invention includes a plurality of focal planes, where each focal plane comprises a two dimensional arrangement of pixels having at least two pixels in each dimension and each focal plane is contained within a region of the imager array that does not contain pixels from another focal plane, control circuitry configured to control the capture of image information by the pixels within the focal planes, where the control circuitry is configured so that the capture of image information by the pixels in at least two of the focal planes is separately controllable, and sampling circuitry configured to convert pixel outputs into digital pixel data.

What is claimed is: 
     
         1 . An imager array, comprising:
 a plurality of focal planes, where each focal plane comprises a two dimensional arrangement of pixels having at least two pixels in each dimension and each focal plane is contained within a region of the imager array that does not contain pixels from another focal plane;   control circuitry configured to control the capture of image information by the pixels within the focal planes, where the control circuitry is configured so that the capture of image information by the pixels in at least two of the focal planes is separately controllable; and   sampling circuitry configured to convert pixel outputs into digital pixel data.   
     
     
         2 . The imager array of  claim 1 , wherein the plurality of focal planes is arranged as a two dimensional array of focal planes having at least three focal planes in one dimension. 
     
     
         3 . The imager array of  claim 1 , wherein the plurality of focal planes is arranged as a two dimensional array of focal planes having at least three focal planes in both dimensions. 
     
     
         4 . The imager array of  claim 1 , wherein the plurality of focal planes arranged as an N×M array of focal planes comprising at least two focal planes configured to capture blue light, at least two focal planes configured to capture green light, and at least two focal planes configured to capture red light. 
     
     
         5 . The imager array of  claim 1 , wherein each focal plane comprises rows and columns of pixels. 
     
     
         6 . The imager array of  claim 1 , wherein the control circuitry is configured to control capture of image information by a pixel by controlling the resetting of the pixel. 
     
     
         7 . The imager array of  claim 1 , wherein the control circuitry is configured to control capture of image information by a pixel by controlling the readout of the pixel. 
     
     
         8 . The imager array of  claim 1 , wherein the control circuitry is configured to control capture of image information by controlling the integration time of each pixel. 
     
     
         9 . The imager array of  claim 1 , wherein the control circuitry is configured to control the processing of image information by controlling the gain of the sampling circuitry. 
     
     
         10 . The imager array of  claim 1 , wherein the control circuitry is configured to control the processing of image information by controlling the black level offset of each pixel. 
     
     
         11 . The imager array of  claim 1 , wherein the control circuitry is configured to control the capture of image information by controlling readout direction. 
     
     
         12 . The imager array of  claim 11 , wherein the read-out direction is selected from the group consisting of:
 top to bottom; and   bottom to top.   
     
     
         13 . The imager array of  claim 11 , wherein the read-out direction is selected from the group consisting of:
 left to right; and   right to left.   
     
     
         14 . The imager array of  claim 1 , wherein the control circuitry is configured to control the capture of image information by controlling the readout region of interest. 
     
     
         15 . The imager array of  claim 1 , wherein the control circuitry is configured to control the capture of image information by controlling horizontal sub-sampling. 
     
     
         16 . The imager array of  claim 1 , wherein the control circuitry is configured to control the capture of image information by controlling vertical sub-sampling. 
     
     
         17 . The imager array of  claim 1 , wherein the control circuitry is configured to control the capture of image information by controlling pixel charge-binning. 
     
     
         18 . The imager array of  claim 1 , wherein the imager array is a monolithic integrated circuit imager array. 
     
     
         19 . The imager array of  claim 1 , wherein a two dimensional array of adjacent pixels in at least one focal plane have the same capture band. 
     
     
         20 . The imager array of  claim 19 , wherein the capture band is selected from the group consisting of:
 blue light;   cyan light;   extended color light comprising visible light and near-infra red light;   green light;   infra-red light;   magenta light;   near-infra red light;   red light;   yellow light; and   white light.