Nonvolatile semiconductor memory device and method of manufacturing the same

Abstract

A nonvolatile semiconductor memory device according to an embodiment comprises: a silicon substrate; and a plurality of memory cells that nonvolatilely accumulate a charge as data, disposed along at least a first direction, on the substrate. A diffusion layer is disposed continuously in a surface of the substrate of a region straddling the plurality of memory cells disposed along the first direction. The memory cell incudes an epitaxial silicon layer disposed on the diffusion layer.

What is claimed Is: 
     
         1 . A nonvolatile semiconductor memory device, comprising:
 a silicon substrate;   a plurality of memory cells disposed along at least a first direction, on the substrate, the plurality of the memory cells nonvolatilely accumulating a charge; and   a diffusion layer disposed continuously in a surface of the substrate of a region straddling the plurality of memory cells disposed along the first direction; wherein   the memory cell includes an epitaxial silicon layer disposed on the diffusion layer.   
     
     
         2 . The nonvolatile semiconductor memory device according to  claim 1 , further comprising:
 a plurality of the memory cells disposed along a second direction, the second direction intersecting the first direction; and   an element isolation insulating film disposed between the plurality of memory cells disposed along the second direction.   
     
     
         3 . The nonvolatile semiconductor memory device according to  claim 1 , wherein
 the plurality of memory cells disposed along the first direction configure a memory string whose one end is connected to a source side select transistor and whose other end is connected to a drain side select transistor, and   the epitaxial silicon layer is disposed continuously between the source side select transistor and the drain side select transistor connected to the two ends of the memory string, so as to be included in the memory cell and disposed between the plurality of memory cells.   
     
     
         4 . The nonvolatile semiconductor memory device according to  claim 1 , wherein
 the plurality of memory cells disposed along the first direction configure a memory string whose one end is connected to a source side select transistor and whose other end is connected to a drain side select transistor, and   the epitaxial silicon layer is divided between each of the memory cells configuring the memory string.   
     
     
         5 . The nonvolatile semiconductor memory device according to  claim 3 , wherein
 a thickness in a third direction orthogonal to the first direction of the substrate of the epitaxial silicon layer included in the memory cell is greater than a thickness in the third direction of the epitaxial silicon layer disposed between the plurality of memory cells.   
     
     
         6 . The nonvolatile semiconductor memory device according to  claim 1 , wherein
 an impurity concentration in the diffusion layer is higher than an impurity concentration in the epitaxial silicon layer.   
     
     
         7 . The nonvolatile semiconductor memory device according to  claim 1 , wherein
 the diffusion layer is a P type diffusion layer.   
     
     
         8 . A method of manufacturing a nonvolatile semiconductor memory device, comprising:
 implanting an impurity in a silicon substrate surface to form a diffusion layer;   forming an epitaxial silicon layer in a region where the diffusion layer is formed on the substrate; and   forming a plurality of memory cells on the epitaxial silicon layer, the plurality of memory cells being formed along at least a first direction on the substrate, the first direction being along a surface of the substrate, and the plurality of the memory cells nonvolatilely accumulating a charge.   
     
     
         9 . The method of manufacturing a nonvolatile semiconductor memory device according to  claim 8 , comprising:
 further forming a plurality of memory cells along a second direction intersecting the first direction, on the substrate; and   forming an element isolation insulating layer between the plurality of memory cells disposed along the second direction, thereby dividing the diffusion layer and the epitaxial silicon layer in the second direction.   
     
     
         10 . The method of manufacturing a nonvolatile semiconductor memory device according to  claim 8 , comprising:
 connecting in series the plurality of memory cells disposed along the first direction and thereby configuring a memory string;   forming a source side select transistor adjacently to the memory cell positioned at one end of the memory string, and forming a drain side select transistor adjacently to the memory cell positioned at the other end of the memory string; and   forming the epitaxial silicon layer so as to be disposed continuously between the source side select transistor and the drain side select transistor connected to the two ends of the memory string, so as to be included in the memory cell and disposed between the plurality of memory cells.   
     
     
         11 . The method of manufacturing a nonvolatile semiconductor memory device according to  claim 8 , comprising:
 connecting in series the plurality of memory cells disposed along the first direction and thereby configuring a memory string;   forming a source side select transistor adjacently to the memory cell positioned at one end of the memory string, and forming a drain side select transistor adjacently to the memory cell positioned at the other end of the memory string; and   dividing the epitaxial silicon layer between each of the memory cells configuring the memory string.   
     
     
         12 . The method of manufacturing a nonvolatile semiconductor memory device according to  claim 10 , comprising:
 etching part of a surface of the epitaxial silicon layer between the plurality of memory cells formed along the first direction; and   making a thickness in a third direction orthogonal to the first direction of the substrate of the epitaxial silicon layer disposed between the plurality of memory cells less than a thickness in the third direction of the epitaxial silicon layer included in the memory cell.   
     
     
         13 . The method of manufacturing a nonvolatile semiconductor memory device according to  claim 8 , wherein
 an impurity concentration in the diffusion layer is higher than an impurity concentration in the epitaxial silicon layer.   
     
     
         14 . The method of manufacturing a nonvolatile semiconductor memory device according to  claim 8 , wherein
 an impurity implanted in the substrate surface is P type.   
     
     
         15 . The method of manufacturing a nonvolatile semiconductor memory device according to  claim 8 , wherein
 formation of the diffusion layer is performed after formation of the epitaxial silicon layer, and   implantation of the impurity is performed on a region positioned more downwardly than a lower surface of the epitaxial silicon layer of the silicon substrate so as to prevent the impurity from being implanted in the epitaxial silicon layer.