Method of manufacturing a semiconductor device including forming a dielectric layer around a patterned etch mask

Abstract

A method of manufacturing a semiconductor device includes: providing a semiconductor having active regions; depositing a dielectric layer on the semiconductor; forming a patterned etch mask on the dielectric layer; depositing a further dielectric layer on the dielectric layer and the patterned etch mask; planarizing the further dielectric layer until the patterned etch mask is exposed; and forming a further patterned etch mask having an opening on the further dielectric layer so that portions of the patterned etch mask are exposed from the opening.

1 . A method of manufacturing a semiconductor device, comprising:
 providing a semiconductor;   depositing a dielectric layer on the semiconductor;   forming a patterned etch mask on the dielectric layer;   depositing a further dielectric layer on the dielectric layer and the patterned etch mask so that an entire top surface of the further dielectric layer is higher than any part of a top surface of the patterned etch mask, wherein the further dielectric layer is in direct physical contact with the dielectric layer and the patterned etch mask;   planarizing the further dielectric layer until the patterned etch mask is exposed; and   forming a further patterned etch mask having an opening on the further dielectric layer, wherein portions of the patterned etch mask are exposed from the opening.   
     
     
         2 . The method of  claim 1 , wherein a composition of the dielectric layer is the same as a composition of the further dielectric layer. 
     
     
         3 . The method of  claim 1 , wherein the patterned etch mask is made of metal, alloy or ceramic material. 
     
     
         4 . The method of  claim 3 , wherein the patterned etch mask is TiN. 
     
     
         5 . The method of  claim 1 , wherein the further dielectric layer has a flat top surface before the step of forming the further patterned etch mask. 
     
     
         6 . The method of  claim 1 , wherein the step of forming the further patterned etch mask comprises:
 coating an organic dielectric layer on the further dielectric layer;   forming a patterned photoresist on the organic dielectric layer; and   etching the organic dielectric layer by using the patterned photoresist as an etch mask.   
     
     
         7 . The method of  claim 6 , wherein there is no organic dielectric layer in the opening when the step of forming the further patterned etch mask is completed. 
     
     
         8 . The method of  claim 1 , wherein the opening is a slot opening. 
     
     
         9 . The method of  claim 1 , wherein the opening has a flat bottom. 
     
     
         10 . The method of  claim 1 , further comprising performing an etching process by using the further patterned etch mask and the patterned etch mask as etch masks. 
     
     
         11 . The method of  claim 1 , further comprising forming a contact opening in the dielectric layer and the further dielectric layer by using the patterned etch mask as an etch mask. 
     
     
         12 . The method of  claim 1 , wherein a long axis of the patterned etch mask is perpendicular to a long axis of the opening. 
     
     
         13 . The method of  claim 1 , wherein the patterned etch mask comprises a plurality of separately disposed masks. 
     
     
         14 . The method of  claim 1 , wherein the semiconductor comprises a plurality of fin-shaped structures, the method further comprising forming at least two contact openings in the dielectric layer so that the fin-shaped structures are exposed from the bottom of the contact openings. 
     
     
         15 . The method of  claim 14 , further comprising using the further patterned etch mask and the patterned etch mask as etch mask during the step of forming the contact openings.