Filling cavities in an integrated circuit and resulting devices

Abstract

A methodology enabling filling of high aspect ratio cavities, with no voids or gaps, in an IC device and the resulting device are disclosed. Embodiments include providing active area and/or gate contacts in a first ILD; forming selective protective caps on upper surfaces of the contacts; forming a second ILD on upper surfaces of the protective caps and on an upper surface of the first ILD; forming a hard-mask stack on the second ILD; forming, in the second ILD and hard-mask stack, cavities exposing one or more protective caps; removing selective layers in the stack to decrease depths of the cavities; and filling the cavities with a metal layer, wherein the metal layer in one or more cavities connects to an upper surface of the one or more exposed protective caps.

What is claimed is: 
     
         1 . A device comprising:
 active area and/or gate contacts in a first interlayer dielectric (ILD);   selective protective caps on upper surfaces of the contacts;   a second ILD on upper surfaces of the protective caps and on an upper surface of the first ILD; and   vias through the second ILD down to the protective caps.   
     
     
         2 . The device according to  claim 1 , further comprising metal line trenches in the second ILD. 
     
     
         3 . The device according to  claim 1 , further comprising an etch stop layer under the second ILD. 
     
     
         4 . The device according to  claim 1 , wherein the protective caps comprise ruthenium. 
     
     
         5 . A device comprising:
 active area and/or gate contacts in a first interlayer dielectric (ILD);   
       selective protective caps on upper surfaces of the contacts;
 a second ILD on upper surfaces of the protective caps and on an upper surface of the first ILD; 
 a hard-mask stack on the second ILD; 
 cavities, in the second ILD and hard-mask stack, exposing one or more protective caps; and 
 a metal layer filling the cavities, wherein the metal layer in one or more cavities connects to an upper surface of the one or more exposed protective caps, 
 wherein the hard-mask stack comprises: 
 
       a first dielectric hard-mask (DHM1) layer, a metal hard-mask (MHM) layer, a second dielectric hard-mask (DHM2) layer, a spin-on hard-mask (SOH) layer, and an antireflective coating (ARC) hard-mask layer; and
 wherein the protective caps comprise ruthenium caps and the contacts are cavities filled with tungsten. 
 
     
     
         6 . The device according to  claim 1 , further comprising:
 a barrier metal/seed layer on exposed surfaces of the DHM1 and ILD layers.   
     
     
         7 . The device according to  claim 5 , wherein the cavities include interconnecting vias and trenches. 
     
     
         8 . The device according to  claim 5 , wherein the metal comprises copper. 
     
     
         9 . A device comprising:
 active area and/or gate contacts in a first interlayer dielectric (ILD);   selective protective caps on upper surfaces of the contacts;   a second ILD on upper surfaces of the protective caps and on an upper surface of the first ILD;   a hard-mask stack on the second ILD, wherein the hard-mask includes a first dielectric hard-mask (DHM1) layer, a metal hard-mask (MHM) layer, a second DHM dielectric hard-mask (DHM2) layer, a spin-on hard-mask (SOH) layer, and an antireflective coating (ARC) hard-mask layer;   cavities, in the second ILD and hard-mask stack, exposing one or more protective caps;   a metal layer in the cavities, wherein the metal layer in one or more cavities connects to an upper surface of the one or more exposed protective caps; and   a barrier metal/seed layer on exposed surfaces of the DHM1 and ILD layers,   wherein the protective caps comprise ruthenium caps, the contacts are cavities filled with tungsten.   
     
     
         10 . The device according to  claim 9 , further comprising metal line trenches in the second ILD. 
     
     
         11 . The device according to  claim 9 , further comprising an etch stop layer under the second ILD. 
     
     
         12 . The device according to  claim 9 , wherein the protective caps comprise ruthenium. 
     
     
         13 . The device according to  claim 9 , wherein the cavities include interconnecting vias and trenches. 
     
     
         14 . The device according to  claim 9 , wherein the metal comprises copper.