Address dependent data encryption
Abstract
Encryption of data within a memory is provided by key generation circuitry which serves to generate a key as a function of the address within the memory being accessed and then encryption circuitry or decryption circuitry which serve respectively to encrypt or decrypt the data as a function of the key that has been generated based upon the address. The encryption and the decryption may be performed using a bitwise XOR operation. The key generation circuitry may have the form of physically unclonable function circuitry, which varies from instance to instance of implementation and that operates to generate the same key for the same address upon both write and read operations within the same instance.
Claims
exact text as granted — not AI-modifiedWe claim:
1 . Apparatus comprising:
memory to store encrypted data representing unencrypted data at a storage location specified by an address; key generation circuitry to generate a key as a function of said address; encryption circuitry to encrypt said unencrypted data to form said encrypted data as a function of said key.
2 . Apparatus as claimed in claim 1 , wherein a given data value stored at different storage locations is encrypted using keys generated as a function of different respective addresses.
3 . Apparatus as claimed in claim 1 , wherein key generation circuitry comprises physically unclonable function circuitry, wherein said address is a challenge input to said physically unclonable function circuitry and said key is a response output from said physically unclonable function circuitry.
4 . Apparatus as claimed in claim 1 , wherein said encryption circuitry has a configuration to perform one-time-pad encryption of said unencrypted data using said key.
5 . Apparatus as claimed in claim 1 , wherein said key has a character width greater than or equal to a character width of said unencrypted data.
6 . Apparatus as claimed in claim 1 , wherein said encryption circuitry has a configuration to perform a bitwise XOR of said unencrypted data with said key to form said encrypted data.
7 . Apparatus as claimed in claim 1 , wherein said memory has data remanence behaviour whereby data values stored within said memory induce physical changes within said memory to permit reconstruction of data erased from said memory.
8 . Apparatus as claimed in claim 7 , wherein said memory is one of:
an SRAM memory; a DRAM memory; and a non-volatile memory.
9 . A method comprising the steps of:
storing encrypted data representing unencrypted data at a storage location specified by an address; and generating a key as a function of said address; said method comprising one of:
encrypting said unencrypted data to form said encrypted data as a function of said key; and
decrypting said encrypted data to form said unencrypted data as a function of said key.
10 . Apparatus comprising:
memory to store encrypted data representing unencrypted data at a storage location specified by an address; key generation circuitry to generate a key as a function of said address; decryption circuitry to decrypt said encrypted data to form said unencrypted data as a function of said key.
11 . Apparatus as claimed in claim 10 , wherein a given data value stored at different storage locations is encrypted using keys generated as a function of different respective addresses.
12 . Apparatus as claimed in claim 10 , wherein key generation circuitry comprises physically unclonable function circuitry, wherein said address is a challenge input to said physically unclonable function circuitry and said key is a response output from said physically unclonable function circuitry.
13 . Apparatus as claimed in claim 10 , wherein said decryption circuitry has a configuration to perform one-time-pad decryption of said encrypted data using said key.
14 . Apparatus as claimed in claim 10 , wherein said key has a character width greater than or equal to a character width of said encrypted data.
15 . Apparatus as claimed in claim 10 , wherein said decryption circuitry has a configuration to perform a bitwise XOR of said encrypted data with said key to form said unencrypted data.
16 . Apparatus as claimed in claim 10 , wherein said memory has data remanence behaviour whereby data values stored within said memory induce physical changes within said memory to permit reconstruction of data erased from said memory.
17 . Apparatus as claimed in claim 16 , wherein said memory is one of:
an SRAM memory; a DRAM memory; and a non-volatile memory.
18 . Apparatus as claimed in claim 10 , comprising encryption circuitry to encrypt said unencrypted data to form said encrypted data as a function of said key.Join the waitlist — get patent alerts
Track US2017046281A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.