US2017041004A1PendingUtilityA1

Semiconductor device and electronic device

Assignee: SEMICONDUCTOR ENERGY LABPriority: Feb 7, 2014Filed: Oct 21, 2016Published: Feb 9, 2017
Est. expiryFeb 7, 2034(~7.5 yrs left)· nominal 20-yr term from priority
H03K 19/17792H03K 19/17728G11C 11/4072G11C 7/20G11C 11/417G11C 11/413G11C 7/1075G06F 9/4401G11C 11/418G11C 11/419
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Claims

Abstract

A semiconductor in which the area of a circuit that is unnecessary during normal operation is small is provided. A semiconductor device including a first circuit has a function of storing a start-up routine in the first circuit and executing the start-up routine, a function of operating the first circuit as a buffer memory device after executing the start-up routine, and a function of loading the start-up routine into the first circuit from outside before the semiconductor device is powered off.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device comprising:
 a memory circuit,   wherein the semiconductor device is capable of storing a start-up routine in the memory circuit and executing the start-up routine,   wherein the semiconductor device is capable of operating the memory circuit as a buffer memory device after executing the start-up routine,   wherein the semiconductor device is capable of loading the start-up routine into the memory circuit from outside after operating the memory circuit as the buffer memory device and before powering off the semiconductor device,   wherein the memory circuit comprises a first transistor, a second transistor, a first circuit, and a second circuit,   wherein the first transistor and the second transistor are electrically connected to each other in series,   wherein a gate of the first transistor is electrically connected to an output terminal of the first circuit,   wherein the gate of the first transistor is electrically connected to an input terminal of the second circuit,   wherein an input terminal of the first circuit is electrically connected to an output terminal of the second circuit,   wherein the first circuit comprises a third transistor and a fourth transistor,   wherein the second circuit comprises a fifth transistor and a sixth transistor,   wherein the first transistor, the second transistor, the third transistor, and the fifth transistor have a first polarity, and   wherein the fourth transistor and the sixth transistor have a second polarity.

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