Semiconductor Device and Method of Manufacturing the Same

Abstract

It is an object to form a buffer circuit, an inverter circuit, or the like using only n-channel TFTs including an oxide semiconductor layer. A buffer circuit, an inverter circuit, or the like is formed by combination of a first transistor in which a source electrode and a drain electrode each overlap with a gate electrode and a second transistor in which a source electrode overlaps with a gate electrode and a drain electrode does not overlap with the gate electrode. Since the second transistor has such a structure, the capacitance C p can be small, and V A ′ can be large even in the case where the potential difference VDD−VSS is small.

What is claimed is: 
     
         1 . (canceled) 
     
     
         2 . A semiconductor device comprising:
 a first gate electrode over a substrate;   a second gate electrode over the substrate;   a first insulating layer over the first gate electrode and the second gate electrode;   a first semiconductor layer over the first insulating layer, the first semiconductor layer overlapping with the first gate electrode;   a second semiconductor layer over the first insulating layer, the second semiconductor layer overlapping with the second gate electrode;   a first electrode over the first semiconductor layer and the second semiconductor layer, the first electrode being electrically connected to the first semiconductor layer and the second semiconductor layer;   a second electrode over the first semiconductor layer, the second electrode being electrically connected to the first semiconductor layer;   a third electrode over the second semiconductor layer, the third electrode being electrically connected to the second semiconductor layer; and   a second insulating layer over the first electrode, the second electrode and the third electrode,   wherein a first portion of the first electrode overlaps with a portion of the first gate electrode,   wherein a second portion of the first electrode overlaps with a first portion of the second gate electrode,   wherein the second insulating layer is in contact with the first semiconductor layer over a region where the first insulating layer is in contact with the substrate,   wherein a portion of the third electrode overlaps with a second portion of the second gate electrode,   wherein at least the first gate electrode and the first semiconductor layer are comprised in a first thin film transistor,   wherein at least the second gate electrode and the second semiconductor layer are comprised in a second thin film transistor,   wherein the first thin film transistor and the second thin film transistor are n-channel thin film transistors,   wherein each of the first semiconductor layer and the second semiconductor layer comprises crystals each including oxygen atoms and metal atoms including In, Zn and Sn,   wherein each of the crystals is a non-single-crystal,   wherein an area of the first portion of the first electrode which overlaps with the portion of the first gate electrode is larger than an area of the second portion of the first electrode which overlaps with the first portion of the second gate electrode,   wherein the area of the second portion of the first electrode which overlaps with the first portion of the second gate electrode is substantially the same as an area of the portion of the third electrode which overlaps with the second portion of the second gate electrode,   wherein the second electrode is electrically connected to a first line that a first constant potential is applied,   wherein the third electrode is electrically connected to a second line that a second constant potential is applied,   wherein the first constant potential is higher than the second constant potential,   wherein a part of the second electrode is configured to function as a drain electrode of the first thin film transistor, and   wherein the area of the first portion of the first electrode is configured to function as a source electrode of the first thin film transistor.   
     
     
         3 . The semiconductor device according to  claim 2 ,
 wherein the first portion of the first electrode, the portion of the first gate electrode and the first insulating layer therebetween are configured to function as a capacitor.   
     
     
         4 . The semiconductor device according to  claim 3 ,
 wherein the first thin film transistor, the second thin film transistor and the capacitor are comprised in a bootstrap inverter circuit.   
     
     
         5 . A semiconductor device comprising:
 a first gate electrode over a substrate;   a second gate electrode over the substrate;   a first insulating layer over the first gate electrode and the second gate electrode;   a first semiconductor layer over the first insulating layer, the first semiconductor layer overlapping with the first gate electrode;   a second semiconductor layer over the first insulating layer, the second semiconductor layer overlapping with the second gate electrode;   a first electrode over the first semiconductor layer and the second semiconductor layer, the first electrode being electrically connected to the first semiconductor layer and the second semiconductor layer;   a second electrode over the first semiconductor layer, the second electrode being electrically connected to the first semiconductor layer;   a third electrode over the second semiconductor layer, the third electrode being electrically connected to the second semiconductor layer; and   a second insulating layer over the first electrode, the second electrode and the third electrode,   wherein a first portion of the first electrode overlaps with a portion of the first gate electrode,   wherein a second portion of the first electrode overlaps with a first portion of the second gate electrode,   wherein the second electrode does not overlap with the first gate electrode,   wherein a portion of the third electrode overlaps with a second portion of the second gate electrode,   wherein at least the first gate electrode and the first semiconductor layer are comprised in a first thin film transistor,   wherein at least the second gate electrode and the second semiconductor layer are comprised in a second thin film transistor,   wherein the first thin film transistor and the second thin film transistor are n-channel thin film transistors,   wherein each of the first semiconductor layer and the second semiconductor layer comprises crystals each including oxygen atoms and metal atoms including In, Zn and Sn,   wherein each of the crystals is a non-single-crystal,   wherein an area of the first portion of the first electrode which overlaps with the portion of the first gate electrode is larger than an area of the second portion of the first electrode which overlaps with the first portion of the second gate electrode,   wherein the area of the second portion of the first electrode which overlaps with the first portion of the second gate electrode is substantially the same as an area of the portion of the third electrode which overlaps with the second portion of the second gate electrode,   wherein the second electrode is electrically connected to a first line that a first constant potential is applied,   wherein the third electrode is electrically connected to a second line that a second constant potential is applied,   wherein the first constant potential is higher than the second constant potential,   wherein a part of the second electrode is configured to function as a drain electrode of the first thin film transistor, and   wherein the area of the first portion of the first electrode is configured to function as a source electrode of the first thin film transistor.   
     
     
         6 . The semiconductor device according to  claim 5 ,
 wherein the first portion of the first electrode, the portion of the first gate electrode and the first insulating layer therebetween are configured to function as a capacitor.   
     
     
         7 . The semiconductor device according to  claim 6 ,
 wherein the first thin film transistor, the second thin film transistor and the capacitor are comprised in a bootstrap inverter circuit.