Bias techniques and circuit arrangements to reduce leakage current in a circuit

Abstract

An apparatus includes an input/output (I/O) pin and an electrostatic discharge device. The electrostatic discharge device is coupled to the I/O pin and to a voltage regulator.

What is claimed is: 
     
         1 . A method comprising:
 providing a discharge current path between an input/output (I/O) pin and an output node of a voltage regulator; and   providing a second discharge current path between the output node and a ground pin.   
     
     
         2 . The method of  claim 1 , further comprising selectively coupling the voltage regulator to a supply voltage by controlling a pull-up transistor and a pull-down transistor. 
     
     
         3 . The method of  claim 2 , wherein the pull-up transistor and the pull-down transistor are included in a head switch coupled to the voltage regulator. 
     
     
         4 . The method of  claim 1 , selectively coupling the voltage regulator to a supply voltage via a head switch, the head switch including a first transistor having a first oxide thickness that is greater than a second oxide thickness of a second transistor of circuitry, the circuitry powered by the voltage regulator. 
     
     
         5 . The method of  claim 4 , wherein the supply voltage is selectively coupled to the voltage regulator based on an enable signal. 
     
     
         6 . The method of  claim 4 , wherein the circuitry includes a device to protect from electrostatic discharge. 
     
     
         7 . The method of  claim 1 , wherein the discharge current path includes a first diode, and wherein the second discharge current path includes an electrostatic discharge device. 
     
     
         8 . The method of  claim 7 , further comprising disabling a clamp circuit of the electrostatic discharge device responsive to an enable signal. 
     
     
         9 . The method of  claim 1 , further comprising providing a third discharge current path between the I/O pin and the ground pin. 
     
     
         10 . The method of  claim 9 , wherein the discharge current path includes a first diode, wherein the second discharge current path includes an electrostatic discharge device, and wherein the third discharge current path includes a second diode. 
     
     
         11 . A method comprising:
 selectively coupling a supply voltage to a voltage regulator via a head switch, wherein the head switch includes a first transistor having a first oxide thickness that is greater than a second oxide thickness of a transistor of circuitry, the circuitry powered by the voltage regulator; and   discharging an electrostatic charge along a discharge current path between the voltage regulator and an input/output (I/O) pin.   
     
     
         12 . The method of  claim 11 , head switch includes a pull-up transistor and a pull-down transistor, and wherein the pull-up transistor and the pull-down transistor are responsive to an enable signal to selectively couple the supply voltage to the voltage regulator. 
     
     
         13 . The method of  claim 11 , further comprising discharging a second electrostatic charge along a second discharge current path between the voltage regulator and a ground pin. 
     
     
         14 . The method of  claim 13 , wherein the discharge current path includes a diode, and wherein the second discharge current path includes an electrostatic discharge device. 
     
     
         15 . The method of  claim 14 , further comprising disabling a clamp circuit of the electrostatic discharge device responsive to a disable signal. 
     
     
         16 . The method of  claim 11 , wherein the circuitry is in a different voltage domain than the head switch. 
     
     
         17 . A method comprising:
 discharging a first electrostatic charge along a first discharge current path between an input/output (I/O) pin and an output node of a voltage regulator; and   discharging a second electrostatic charge along a second discharge current path between the output node and a ground pin.   
     
     
         18 . The method of  claim 17 , further comprising selectively coupling the voltage regulator to a supply voltage via a head switch, the head switch including a first transistor having a first oxide thickness that is greater than a second oxide thickness of a second transistor of circuitry, the circuitry powered by the voltage regulator. 
     
     
         19 . The method of  claim 18 , wherein the circuitry includes a device to be protected from electrostatic discharges. 
     
     
         20 . The method of  claim 17 , further comprising discharging a third electrostatic discharge along a third discharge path between the I/O pin and the ground pin.