Semiconductor Chip and Method for Manufacturing the Same

Abstract

A first transistor has a gate electrode formed by a substantially linear portion of a first conductive structure. A second transistor has a gate electrode formed by a substantially linear portion of a second conductive structure. A third transistor has a gate electrode formed by a substantially linear portion of a third conductive structure. A fourth transistor has a gate electrode formed by a substantially linear portion of a fourth conductive structure. The substantially linear portions of the first, second, third, and fourth conductive structures extend in a first direction and are positioned in accordance with a gate pitch. Gate electrodes of the first and second transistors have a first size as measured in the first direction. Gate electrodes of the third and fourth transistors have a second size as measured in the first direction. The first size is at least two times the second size.

What is claimed is: 
     
         1 . A semiconductor chip, comprising:
 a first transistor having a gate electrode formed by a portion of a first conductive structure that extends in a substantially straight manner in a first direction, the portion of the first conductive structure having a lengthwise centerline oriented to extend in the first direction;   a second transistor having a gate electrode formed by a portion of a second conductive structure that extends in a substantially straight manner in the first direction, the portion of the second conductive structure having a lengthwise centerline oriented to extend in the first direction;   a third transistor having a gate electrode formed by a portion of a third conductive structure that extends in a substantially straight manner in the first direction, the portion of the third conductive structure having a lengthwise centerline oriented to extend in the first direction; and   a fourth transistor having a gate electrode formed by a portion of a fourth conductive structure that extends in a substantially straight manner in the first direction, the portion of the fourth conductive structure having a lengthwise centerline oriented to extend in the first direction,   wherein any two of the lengthwise centerlines of the portions of the first, second, third, and fourth conductive structures are separated from each other by a distance as measured in a second direction perpendicular to the first direction that is an integer multiple of a gate pitch,   wherein the gate electrodes of the first and second transistors have a first size as measured in the first direction, and wherein the gate electrodes of the third and fourth transistors have a second size as measured in the first direction, the first size at least two times the second size.   
     
     
         2 . A method for manufacturing an integrated circuit within a semiconductor chip, comprising:
 forming a first transistor having a gate electrode formed by a portion of a first conductive structure that extends in a substantially straight manner in a first direction, the portion of the first conductive structure having a lengthwise centerline oriented to extend in the first direction;   forming a second transistor having a gate electrode formed by a portion of a second conductive structure that extends in a substantially straight manner in the first direction, the portion of the second conductive structure having a lengthwise centerline oriented to extend in the first direction;   forming a third transistor having a gate electrode formed by a portion of a third conductive structure that extends in a substantially straight manner in the first direction, the portion of the third conductive structure having a lengthwise centerline oriented to extend in the first direction; and   forming a fourth transistor having a gate electrode formed by a portion of a fourth conductive structure that extends in a substantially straight manner in the first direction, the portion of the fourth conductive structure having a lengthwise centerline oriented to extend in the first direction,   wherein any two of the lengthwise centerlines of the portions of the first, second, third, and fourth conductive structures are separated from each other by a distance as measured in a second direction perpendicular to the first direction that is an integer multiple of a gate pitch,   wherein the gate electrodes of the first and second transistors have a first size as measured in the first direction, and wherein the gate electrodes of the third and fourth transistors have a second size as measured in the first direction, the first size at least two times the second size.