US2016379939A1PendingUtilityA1

Removable substrate for controlling warpage of an integrated circuit package

Assignee: NVIDIA CORPPriority: Jun 25, 2015Filed: Aug 22, 2016Published: Dec 29, 2016
Est. expiryJun 25, 2035(~8.9 yrs left)· nominal 20-yr term from priority
H10W 72/073H10W 72/072H10W 72/877H10W 90/00H10W 99/00H10W 72/952H10W 72/07236H10W 72/351H10W 72/325H10W 90/724H10W 72/252H10W 90/736H05K 1/0271H05K 3/3436H10P 72/7412H10P 72/744H10P 72/74H10W 90/722H10W 90/288H10W 72/07207H10W 40/70H10W 76/40H10W 70/635H10W 40/22H10W 42/121H01L 2224/81005H01L 2221/68318H01L 21/6835H01L 23/3675H01L 2224/73253H01L 2224/92225H01L 2924/3511H01L 24/92H01L 24/83H01L 2224/16227H01L 24/81H01L 2221/68381H01L 2924/14H01L 23/562H01L 2924/15311
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Claims

Abstract

One embodiment of the present invention sets forth a technique for packaging an integrated circuit die. The technique includes bonding a first surface of the integrated circuit die to a first substrate via a first plurality of solder bump structures and bonding a second substrate to a second surface of the integrated circuit die. The technique further includes bonding the first substrate to a third substrate via a second plurality of solder bump structures and, after bonding the first substrate to the third substrate, removing the second substrate from the second surface of the integrated circuit die. The technique further includes disposing a heat sink on the second surface of the integrated circuit die.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for packaging an integrated circuit die, the method comprising:
 bonding a first surface of the integrated circuit die to a first substrate via a first plurality of solder bump structures;   bonding the first substrate to a second substrate via a second plurality of solder bump structures;   after bonding the first substrate to the second substrate, disposing a heat sink on a second surface of the integrated circuit die.   
     
     
         2 . The method of  claim 1 , further comprising bonding a third substrate to the second surface of the integrated circuit die prior to disposing the heat sink on the second surface of the integrated circuit die. 
     
     
         3 . The method of  claim 2 , wherein bonding the third substrate to the second surface comprises disposing a temporary adhesive between the third substrate and the second surface of the integrated circuit die. 
     
     
         4 . The method of  claim 3 , further comprising removing the third substrate from the second surface of the integrated circuit die by exposing the temporary adhesive to a first wavelength of light. 
     
     
         5 . The method of  claim 4 , wherein the first wavelength of light is within the ultraviolet range. 
     
     
         6 . The method of  claim 3 , further comprising removing the third substrate from the second surface by exposing the temporary adhesive to a chemical compound. 
     
     
         7 . The method of  claim 3 , wherein the temporary adhesive comprises a polyimide. 
     
     
         8 . The method of  claim 3 , wherein the temporary adhesive can withstand a temperature of at least 200 degrees Celsius without releasing the second substrate from the second surface of the integrated circuit die. 
     
     
         9 . The method of  claim 2 , wherein the third substrate comprises a semi-transparent substrate. 
     
     
         10 . The method of  claim 9 , wherein the third substrate comprises glass. 
     
     
         11 . The method of  claim 2 , wherein the third substrate comprises a metal alloy having a softening point above approximately 200 degrees Celsius. 
     
     
         12 . The method of  claim 2 , wherein the third substrate comprises a ceramic. 
     
     
         13 . The method of  claim 1 , wherein the second substrate comprises a circuit board. 
     
     
         14 . A method for packaging an integrated circuit die, the method comprising:
 bonding a first surface of the integrated circuit die to a first substrate via a first plurality of solder bump structures;   bonding a surface of a second substrate to a stiffening structure, wherein the surface of the second substrate faces a second surface of the integrated circuit die;   bonding the first substrate to a circuit board via a second plurality of solder bump structures;   removing the second substrate from the stiffening structure; and   disposing a heat sink on the second surface of the integrated circuit die.   
     
     
         15 . The method of  claim 14 , wherein bonding the second substrate to the stiffening structure comprises disposing a temporary adhesive between the second substrate and the stiffening structure. 
     
     
         16 . The method of  claim 15 , wherein removing the second substrate from the stiffening structure comprises exposing the temporary adhesive to a first wavelength of light. 
     
     
         17 . The method of  claim 16 , wherein the first wavelength of light is within the ultraviolet range. 
     
     
         18 . The method of  claim 15 , wherein removing the second substrate from the stiffening structure comprises exposing the temporary adhesive to a chemical compound. 
     
     
         19 . The method of  claim 15 , wherein the temporary adhesive can withstand a temperature of at least 200 degrees Celsius without releasing the second substrate from the second surface of the integrated circuit die. 
     
     
         20 . The method of  claim 14 , wherein the stiffening structure is disposed around a perimeter of the integrated circuit die.

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