Device controller and method to forensically secure electronic data storage device

Abstract

A device controller and method to forensically secure a storage device. A device controller, interfaced between a processing device and a storage device, includes a processor and computer memory having stored therein a maintenance list including a maintenance routine. In response to a forensic mode request from the processing device, the processor transitions the device controller to a forensic mode that disables execution of the maintenance routine and any write requests involving the storage device. In response to a subsequent forensic mode request, the processor returns the device controller to a free mode. Transitioning and/or returning can be conditioned on authentication of any one or more forensic mode requests.

Therefore, we claim: 
     
         1 . A device controller interfaced between an electronic processing device and an electronic data storage device, said controller comprising:
 at least one processor communicatively connected to at least one computer memory having stored therein a maintenance list including at least one maintenance routine entry;   wherein in response to a particular forensic mode request received from the electronic processing device, said at least one processor transitions the device controller to a forensic mode that disables execution of the at least one maintenance routine and execution of a write request involving the storage device.   
     
     
         2 . The device controller of  claim 1 , wherein the at least one memory has further stored therein at least one authentication routine, the particular forensic mode request includes particular authentication data, and said at least one processor transitions the device controller to the forensic mode based, at least in part, on authentication of the particular forensic mode request via the particular authentication data and a particular one of the at least one authentication routine. 
     
     
         3 . The device controller of  claim 1 , wherein in response to a subsequent forensic mode request received from one of the electronic processing device and another processing device, said at least one processor transitions the device controller from the forensic mode to a free mode that enables execution of the at least one maintenance routine and execution of the write request involving the storage device. 
     
     
         4 . The device controller of  claim 3 , wherein the at least one memory has further stored therein at least one authentication routine, the particular forensic mode request includes particular authentication data, and said at least one processor transitions the device controller to the forensic mode based, at least in part, on authentication of the particular forensic mode request via the particular authentication data and a particular one of the at least one authentication routine. 
     
     
         5 . The device controller of  claim 4 , wherein the subsequent forensic mode request includes subsequent authentication data, and said at least one processor transitions the device controller from the forensic mode to the free mode based, at least in part, on authentication of the subsequent forensic mode request via the subsequent authentication data and one of the particular one of the at least one authentication routine and another of the at least one authentication routine. 
     
     
         6 . The device controller of  claim 3 , wherein the at least one memory has further stored therein at least one authentication routine, the subsequent forensic mode request includes authentication data, and said at least one processor transitions the device controller from the forensic mode to the free mode based, at least in part, on authentication of the subsequent forensic mode request via the authentication data and one of the at least one authentication routine. 
     
     
         7 . The device controller of  claim 3 , wherein the particular forensic mode request and the subsequent forensic mode request are identical data instances. 
     
     
         8 . The device controller of  claim 7 , wherein the at least one memory has further stored therein at least one authentication routine, the forensic mode request includes particular authentication data, and said at least one processor transitions the device controller to the forensic mode based, at least in part, on authentication of the particular forensic mode request via the particular authentication data and a particular one of the at least one authentication routine. 
     
     
         9 . The device controller of  claim 8 , wherein the subsequent forensic mode request includes subsequent authentication data, and said at least one processor transitions the device controller from the forensic mode to the free mode based, at least in part, on authentication of the subsequent forensic mode request via the subsequent authentication data and one of the particular one of the at least one authentication routine and another of the at least one authentication routine. 
     
     
         10 . The device controller of  claim 7 , wherein the at least one memory has further stored therein at least one authentication routine, the subsequent forensic mode request includes authentication data, and said at least one processor transitions the device controller from the forensic mode to the free mode based, at least in part, on authentication of the subsequent forensic mode request via the authentication data and one of the at least one authentication routine. 
     
     
         11 . The device controller of  claim 3 , wherein the particular forensic mode request and the subsequent forensic mode request are different data instances. 
     
     
         12 . The device controller of  claim 11 , wherein the at least one memory has further stored therein at least one authentication routine, the forensic mode request includes particular authentication data, and said at least one processor transitions the device controller to the forensic mode based, at least in part, on authentication of the particular forensic mode request via the particular authentication data and a particular one of the at least one authentication routine. 
     
     
         13 . The device controller of  claim 12 , wherein the subsequent forensic mode request includes subsequent authentication data, and said at least one processor transitions the device controller from the forensic mode to the free mode based, at least in part, on authentication of the subsequent forensic mode request via the subsequent authentication data and one of the particular one of the at least one authentication routine and another of the at least one authentication routine. 
     
     
         14 . The device controller of  claim 11 , wherein the at least one memory has further stored therein at least one authentication routine, the subsequent forensic mode request includes authentication data, and said at least one processor transitions the device controller from the forensic mode to the free mode based, at least in part, on authentication of the subsequent forensic mode request via the authentication data and one of the at least one authentication routine. 
     
     
         15 . In a system comprising a device controller interfaced between an electronic processing device and an electronic data storage device, with the device having at least one processor communicatively connected to at least one computer memory having stored therein a maintenance list including at least one maintenance routine entry, a method of forensically securing the storage device, comprising:
 receiving, by the at least one processor, a particular forensic mode request from the electronic processing device;   in response to said step of receiving, transitioning the device controller to a forensic mode; and   in response to said step of transitioning, disabling execution by the at least one processor of the at least one maintenance routine and of a write request involving the storage device.   
     
     
         16 . The method of  claim 15 , wherein the at least one memory has further stored therein at least one authentication routine, the forensic mode request includes particular authentication data, and said step of transitioning includes authenticating the particular forensic mode request via the particular authentication data and a particular one of the at least one authentication routine. 
     
     
         17 . The method of  claim 15 , further comprising:
 receiving a subsequent forensic mode request from one of the electronic processing device and another processing device; and   returning, by the at least one processor, the device controller from the forensic mode to a free mode in which execution of the at least one maintenance routine and execution of the write request involving the storage device are enabled.   
     
     
         18 . The method of  claim 17 , wherein the at least one memory has further stored therein at least one authentication routine, the forensic mode request includes particular authentication data, and said step of transitioning includes authenticating the particular forensic mode request via the particular authentication data and a particular one of the at least one authentication routine. 
     
     
         19 . The method of  claim 18 , wherein the subsequent forensic mode request includes subsequent authentication data, and said step of returning includes authenticating the subsequent forensic mode request via the subsequent authentication data and one of the particular one of the at least one authentication routine and another of the at least one authentication routine. 
     
     
         20 . The method of  claim 17 , wherein the at least one memory has further stored therein at least one authentication routine, the subsequent forensic mode request includes authentication data, and said step of returning includes authenticating the subsequent forensic mode request via the authentication data and one of the at least one authentication routine. 
     
     
         21 . The method of  claim 17 , wherein the particular forensic mode request and the subsequent forensic mode request are the same. 
     
     
         22 . The method of  claim 21 , wherein the at least one memory has further stored therein at least one authentication routine, the forensic mode request includes particular authentication data, and said step of transitioning includes authenticating the particular forensic mode request via the particular authentication data and a particular one of the at least one authentication routine. 
     
     
         23 . The method of  claim 22 , wherein the subsequent forensic mode request includes subsequent authentication data, and said step of returning includes authenticating the subsequent forensic mode request via the subsequent authentication data and one of the particular one of the at least one authentication routine and another of the at least one authentication routine. 
     
     
         24 . The method of  claim 21 , wherein the at least one memory has further stored therein at least one authentication routine, the subsequent forensic mode request includes authentication data, and said step of returning includes authenticating the subsequent forensic mode request via the authentication data and one of the at least one authentication routine. 
     
     
         25 . The method of  claim 17 , wherein the particular forensic mode request and the subsequent forensic mode request are different. 
     
     
         26 . The method of  claim 25 , wherein the at least one memory has further stored therein at least one authentication routine, the forensic mode request includes particular authentication data, and said step of transitioning includes authenticating the particular forensic mode request via the particular authentication data and a particular one of the at least one authentication routine. 
     
     
         27 . The method of  claim 26 , wherein the subsequent forensic mode request includes subsequent authentication data, and said step of returning includes authenticating the subsequent forensic mode request via the subsequent authentication data and one of the particular one of the at least one authentication routine and another of the at least one authentication routine. 
     
     
         28 . The method of  claim 25 , wherein the at least one memory has further stored therein at least one authentication routine, the subsequent forensic mode request includes authentication data, and said step of returning includes authenticating the subsequent forensic mode request via the authentication data and one of the at least one authentication routine.