Determining a write operation

Abstract

Technologies are generally described herein for writing data to either volatile or nonvolatile memory. An estimated time for a last write operation to occur and an estimated time to a power down event are determined. A threshold time is generated from the estimated time for a last write operation to occur and the estimated time to a power down event. The threshold time represents time at which a cost to write to volatile memory may become greater than a cost to write to nonvolatile memory. The cost may be based at least in part on the need to copy data stored in a volatile memory to be persisted after a power down event from the volatile to the nonvolatile memory.

What is claimed is: 
     
         1 . A memory system, comprising:
 a memory controller;   a write location unit configured to receive one or more write location inputs and provide a write location output, wherein the write location unit includes:
 a cost calculator configured to use the one or more received write location inputs to determine a cost to write data to a volatile memory and a cost to write the data to a nonvolatile memory, and 
 a threshold time generator configured to determine a threshold time, wherein the write location output is based on the determined cost to write data to the volatile memory, the determined cost to write data to the nonvolatile memory, and the determined threshold time; 
   a write logical unit coupled to the write location unit and to the memory controller, and configured to:
 receive the write location output from the write location unit, and 
 provide an output, based on the received write location output, to the memory controller to have data written to volatile memory or nonvolatile memory; 
   wherein the memory controller is configured to be responsive to the output from the write logical unit to cause the data to be written to the volatile memory or the nonvolatile memory based on the output from the write logical unit.   
     
     
         2 . The memory system of  claim 1 , further comprising a dynamic profiler, a write behavior analyzer, and a static compiler analyzer coupled to the write location unit, wherein the write location unit is configured to receive the one or more write location inputs from the dynamic profiler, the write behavior analyzer, the static compiler analyzer, or a combination thereof. 
     
     
         3 . The memory system of  claim 2 , wherein the dynamic profiler is configured to perform a dynamic profiler operation on an application over a trainer data set by emulation of an operation of the application, including:
 association of instrumentation program code with a write function of program code used to implement the application;   generation of a hash value of a memory address for the write function with the associated instrumentation program code;   input of the generated hash value as an index to a table; and   increment of an index value of the index for the write function.   
     
     
         4 . The memory system of  claim 3 , wherein the dynamic profiler is further configured to perform the dynamic profiler operation by calculation of a frequency of write operations with the index value of the index over a period of time. 
     
     
         5 . The memory system of  claim 4 , wherein the dynamic profiler is further configured to perform the dynamic profiler operation by estimation of a next write operation based on the frequency of write operations. 
     
     
         6 . The memory system of  claim 3 , wherein the dynamic profiler is further configured to perform the dynamic profiler operation by reduction of an amount of information by limitation of a number of hash value entries for the hash value. 
     
     
         7 . The memory system of  claim 3 , wherein the dynamic profiler is further configured to perform the dynamic profiler operation by reduction of an amount of information by tolerance of a measure of aliasing between different memory addresses mapped to a table entry of the table. 
     
     
         8 . The memory system of  claim 3 , wherein the dynamic profiler is further configured to perform the dynamic profiler operation by reduction of an amount of information by increment of the index value of the index for the write function based on a cache block. 
     
     
         9 . The memory system of  claim 2 , wherein the write behavior analyzer is configured to analyze a write behavior of an application by receipt of data related to a distribution of write operations per memory address as a function of time for the application and by determination of a rate of write operations per memory address as a function of time based on the data related to the distribution of write operations. 
     
     
         10 . The memory system of  claim 2 , wherein the static compiler analyzer is configured to perform a static compiler analysis operation on an application. 
     
     
         11 . A method to perform a write operation, the method comprising:
 determining a cost to write data to a volatile memory and a cost to write the data to a nonvolatile memory using one or more write location inputs;   determining a threshold time;   generating a write location output based on the determined cost to write data to the volatile memory, the determined cost to write data to the nonvolatile memory, and the determined threshold time;   providing an output, based on the write location output, to a memory controller to have data written to the volatile memory or the nonvolatile memory; and   responsive to the output provided to the memory controller to have data written to the volatile memory or the nonvolatile memory, causing the data to be written to the volatile memory or the nonvolatile memory.   
     
     
         12 . The method of  claim 11 , wherein generating the write location output based on the determined cost to write data to the volatile memory, the determined cost to write data to the nonvolatile memory, and the determined threshold time includes generating, before the threshold time, an instruction to write the data to the volatile memory in response to the cost to write data to the volatile memory being less than the cost to write data to the nonvolatile memory. 
     
     
         13 . The method of  claim 11 , wherein generating the write location output based on the determined cost to write data to the volatile memory, the determined cost to write data to the nonvolatile memory, and the determined threshold time includes generating, at or after the threshold time, an instruction to write the data to the nonvolatile memory in response to the cost to write data to the nonvolatile memory being less than the cost to write data to the volatile memory. 
     
     
         14 . The method of  claim 11 , further comprising generating the one or more write location inputs by performing a dynamic profiler operation on an application over a trainer data set configured to emulate an operation of the application, including:
 associating instrumentation program code with a write function of program code used to implement the application;   generating a hash value of a memory address for the write function with the associated instrumentation program code;   inputting the generated hash value as an index to a table; and   incrementing an index value of the index for the write function.   
     
     
         15 . The method of  claim 14 , wherein performing the dynamic profiler operation further comprises calculating a frequency of write operations with the index value of the index over a period of time. 
     
     
         16 . The method of  claim 15 , wherein performing the dynamic profiler operation further comprises estimating a next write operation based on the frequency of write operations. 
     
     
         17 . The method of  claim 14 , wherein performing the dynamic profiler operation further comprises reducing an amount of information by limiting a number of hash value entries for the hash value. 
     
     
         18 . The method of  claim 14 , wherein performing the dynamic profiler operation further includes reducing an amount of information by tolerating a measure of aliasing between different memory addresses mapped to a table entry of the table. 
     
     
         19 . The method of  claim 14 , wherein performing the dynamic profiler operation further comprises reducing an amount of information by incrementing the index value of the index for the write function based on a cache block. 
     
     
         20 . The method of  claim 11 , further comprising generating the one or more write location inputs by analyzing a write behavior of an application, including:
 receiving data related to a distribution of write operations per memory address as a function of time for the application; and   determining a rate of write operations per memory address as a function of time based on the data related to the distribution of write operations.   
     
     
         22 . The method of  claim 11 , further comprising generating the one or more write location inputs by performing a static compiler analysis operation on an application. 
     
     
         23 . A memory system, comprising:
 a memory controller;   a write location unit configured to:
 receive one or more write location inputs; 
 determine, based on the one or more write location inputs, an estimated power down event time and an estimated time prior to the estimated power down event time in which a last write operation for an application may occur; 
 determine, based on the estimated power down event time and the estimated time in which the last write operation for the application may occur, a threshold time; and 
 generate, based on the threshold time, a write location output that indicates whether to perform a memory write operation to a volatile memory or a nonvolatile memory; 
   a write logical unit coupled to the write location unit and to the memory controller and configured to:
 receive the write location output from the write location unit, and 
 provide an output, based on the received write location output, to the memory controller to perform the memory write operation to the volatile memory or the nonvolatile memory; 
   wherein the memory controller is configured to be responsive to the output from the write logical unit to perform the memory write operation to the volatile memory or the nonvolatile memory based on the output from the write logical unit, including:
 perform the memory write operation to the volatile memory in response to the memory write operation being scheduled to occur before the threshold time; and 
 perform the memory write operation to the nonvolatile memory in response to the memory write operation being scheduled to occur at or after the threshold time. 
   
     
     
         24 . The memory system of  claim 23 , further comprising a dynamic profiler coupled to the write location unit, wherein the write location unit is configured to receive the one or more write location inputs from the dynamic profiler and wherein the dynamic profiler is configured to perform a dynamic profiler operation on an application over a trainer data set by emulation of an operation of the application. 
     
     
         25 . The memory system of  claim 23 , further comprising a static compiler analyzer coupled to the write location unit, wherein the write location unit is configured to receive the one or more write location inputs from the static compiler analyzer and wherein the static compiler analyzer is configured to perform a static compiler analysis operation on an application. 
     
     
         26 . The memory system of  claim 23 , further comprising a write behavior analyzer coupled to the write location unit, wherein:
 the write location unit is configured to receive the one or more write location inputs from the write behavior analyzer; and   the write behavior analyzer is configured to analyze a write behavior of an application by receipt of data related to a distribution of write operations per memory address as a function of time for the application and by determination of a rate of write operations per memory address as a function of time based on the data related to the distribution of write operations.   
     
     
         27 . A method to perform a write operation, the method comprising:
 determining a cost to write data to a volatile memory and a cost to write the data to a nonvolatile memory using one or more write location inputs;   determining a threshold time;   generating an output based on the determined cost to write data to the volatile memory, the determined cost to write data to the nonvolatile memory, and the determined threshold time;   providing the output to a memory controller to have data written to the volatile memory or the nonvolatile memory; and   responsive to the output provided to the memory controller to have data written to the volatile memory or the nonvolatile memory, causing the data to be written to the volatile memory or the nonvolatile memory.   
     
     
         28 . The method of  claim 27 , wherein generating the output based on the determined cost to write data to the volatile memory, the determined cost to write data to the nonvolatile memory, and the determined threshold time includes generating, before the threshold time, an instruction to write the data to the volatile memory in response to the cost to write data to the volatile memory being less than the cost to write data to the nonvolatile memory. 
     
     
         29 . The method of  claim 27 , wherein generating the output based on the determined cost to write data to the volatile memory, the determined cost to write data to the nonvolatile memory, and the determined threshold time includes generating, at or after the threshold time, an instruction to write the data to the nonvolatile memory in response to the cost to write data to the nonvolatile memory being less than the cost to write data to the volatile memory.