Semiconductor device and manufacturing method thereof
Abstract
A semiconductor device includes an electron transit layer configured to be formed on a substrate; an electron supply layer configured to be formed on the electron transit layer; an upper surface layer configured to be formed on the electron supply layer; a gate electrode configured to be formed on the electron supply layer or the upper surface layer; a source electrode and a drain electrode configured to be formed on the upper surface layer; and first conductivity-type regions configured to be formed in the upper surface layer and the electron supply layer immediately below regions where the source electrode and the drain electrode are formed. The electron supply layer is formed of a nitride semiconductor including In. The upper surface layer is formed of a material including a nitride of one or more elements selected among B, Al, and Ga.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device comprising:
an electron transit layer configured to be formed on a substrate; an electron supply layer configured to be formed on the electron transit layer; an upper surface layer configured to be formed on the electron supply layer; a gate electrode configured to be formed on the electron supply layer or the upper surface layer; a source electrode and a drain electrode configured to be formed on the upper surface layer; and first conductivity-type regions configured to be formed in the upper surface layer and the electron supply layer immediately below regions where the source electrode and the drain electrode are formed, wherein the electron supply layer is formed of a nitride semiconductor including In, wherein the upper surface layer is formed of a material including a nitride of one or more elements selected among B, Al, and Ga.
2 . A semiconductor device comprising:
an electron transit layer configured to be formed on a substrate; an electron supply layer configured to be formed on the electron transit layer; an upper surface layer configured to be formed on the electron supply layer; a gate electrode configured to be formed on the electron supply layer or the upper surface layer; a source electrode and a drain electrode configured to be formed on the electron supply layer; and first conductivity-type regions configured to be formed in the electron supply layer immediately below regions where the source electrode and the drain electrode are formed, wherein the electron supply layer is formed of a nitride semiconductor including In, wherein the upper surface layer is formed of a material including a nitride of one or more elements selected among B, Al, and Ga.
3 . The semiconductor device as claimed in claim 1 , wherein the first conductivity-type region is also formed in a part of the electron transit layer immediately below the regions where the source electrode and the drain electrode are formed.
4 . A semiconductor device comprising:
an electron transit layer configured to be formed on a substrate; an electron supply layer configured to be formed on the electron transit layer; an upper surface layer configured to be formed on the electron supply layer; a gate electrode configured to be formed on the electron supply layer or the upper surface layer; a source electrode and a drain electrode configured to be formed on the electron transit layer; and first conductivity-type regions configured to be formed in the electron transit layer contacting the source electrode and the drain electrode, wherein the electron supply layer is formed of a nitride semiconductor including In, wherein the upper surface layer is formed of a material including a nitride of one or more elements selected among B, Al, and Ga.
5 . The semiconductor device as claimed in claim 1 , wherein the first conductivity-type is n-type.
6 . The semiconductor device as claimed in claim 1 , wherein the first conductivity-type regions have ion implantation applied with Si.
7 . A semiconductor device comprising:
an electron transit layer configured to be formed on a substrate; an electron supply layer configured to be formed on the electron transit layer; an upper surface layer configured to be formed on the electron supply layer; an insulation film configured to be formed on the upper surface layer; a gate electrode configured to be formed on the insulation film; and a source electrode and a drain electrode configured to be formed on the upper surface layer or the electron supply layer, wherein the electron supply layer is formed of a nitride semiconductor including In, wherein the upper surface layer is formed of a material including a nitride of one or more elements selected among B, Al, and Ga.
8 . The semiconductor device as claimed in claim 7 , wherein the insulation film is formed of a material including an aluminum oxide.
9 . The semiconductor device as claimed in claim 1 , further comprising:
an intermediate layer configured to be formed between the electron transit layer and the electron supply layer, wherein the intermediate layer is formed of a material including AlN.
10 . The semiconductor device as claimed in claim 1 , wherein the upper surface layer is formed of a material including one of AlGaN, GaN, AlN, and BGaN.
11 . The semiconductor device as claimed in claim 1 , wherein the electron supply layer is formed of a material including InAlN.
12 . The semiconductor device as claimed in claim 1 , wherein the electron transit layer is formed of a material including GaN.
13 . A manufacturing method of a semiconductor device, the method comprising:
forming an electron transit layer, an electron supply layer, and an upper surface layer in order on a substrate by epitaxial growth; implanting ions of an impurity element of a first conductivity-type in regions immediately below where a source electrode and a drain electrode are formed in the electron supply layer and the upper surface layer; applying heat to activate the ions so that the regions with the implanted ions become first conductivity-type regions; forming the source electrode and the drain electrode on the upper surface layer; forming a gate electrode on the upper surface layer, wherein the electron supply layer is formed of a nitride semiconductor including In, wherein the upper surface layer is formed of a material including a nitride of one or more elements selected among B, Al, and Ga.
14 . A manufacturing method of a semiconductor device, the method comprising:
forming an electron transit layer, an electron supply layer, and an upper surface layer in order on a substrate by epitaxial growth; forming an insulation film on the upper surface layer; applying heat after the forming the insulation film; forming a source electrode and a drain electrode on the upper surface layer; and forming a gate electrode on the insulation film, wherein the electron supply layer is formed of a nitride semiconductor including In, wherein the upper surface layer is formed of a material including a nitride of one or more elements selected among B, Al, and Ga.
15 . The manufacturing method of the semiconductor device as claimed in claim 14 , wherein the insulation film is formed of a material including an aluminum oxide.
16 . A power source device comprising:
a semiconductor device including
an electron transit layer configured to be formed on a substrate,
an electron supply layer configured to be formed on the electron transit layer,
an upper surface layer configured to be formed on the electron supply layer,
a gate electrode configured to be formed on the electron supply layer or the upper surface layer,
a source electrode and a drain electrode configured to be formed on the upper surface layer, and
first conductivity-type regions configured to be formed in the upper surface layer and the electron supply layer immediately below regions where the source electrode and the drain electrode are formed,
wherein the electron supply layer is formed of a nitride semiconductor including In,
wherein the upper surface layer is formed of a material including a nitride of one or more elements selected among B, Al, and Ga.
17 . An amplifier comprising:
a semiconductor device including
an electron transit layer configured to be formed on a substrate,
an electron supply layer configured to be formed on the electron transit layer,
an upper surface layer configured to be formed on the electron supply layer,
a gate electrode configured to be formed on the electron supply layer or the upper surface layer,
a source electrode and a drain electrode configured to be formed on the upper surface layer, and
first conductivity-type regions configured to be formed in the upper surface layer and the electron supply layer immediately below regions where the source electrode and the drain electrode are formed,
wherein the electron supply layer is formed of a nitride semiconductor including In,
wherein the upper surface layer is formed of a material including a nitride of one or more elements selected among B, Al, and Ga.Join the waitlist — get patent alerts
Track US2016343843A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.