US2016343682A1PendingUtilityA1

Semiconductor device

Assignee: TOSHIBA KKPriority: Dec 11, 2013Filed: Aug 5, 2016Published: Nov 24, 2016
Est. expiryDec 11, 2033(~7.4 yrs left)· nominal 20-yr term from priority
Inventors:Atsuko Kawasaki
H10W 72/01H10W 90/722H10W 72/0198H10W 72/952H10W 72/01953H10W 72/01931H10W 80/312H10W 80/327H10W 72/941H10W 80/333H10W 80/102H10W 90/792H10W 72/9415H10W 80/743H10W 90/00H10P 50/73H10W 90/22H10W 70/093H10W 70/60H10W 70/09H01L 2224/24146H01L 24/19H01L 2924/01029H01L 2924/01013H01L 24/24H01L 25/0657H01L 2924/05042H01L 2224/215H01L 2924/05442
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Claims

Abstract

Certain embodiments provide a method for manufacturing a semiconductor device including forming a first interconnection layer having a first conductive layer and a first insulating layer which are exposed from a surface of the first interconnection layer, forming a second interconnection layer having a second conductive layer and a second insulating layer which are exposed from a surface of the second interconnection layer, forming a first non-bonded surface on the surface of the first insulating layer by making a partial area of the surface of the first insulating layer lower than the surface of the first conductive layer, the partial area containing surroundings of the first conductive layer, and connecting the surface of the first conductive layer and the surface of the second conductive layer and bonding the surface of the first insulating layer excluding the first non-bonded surface and the surface of the second insulating layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device comprising:
 a first interconnection layer including a first conductive layer and a first insulating layer, the first interconnection layer including a first non-bonded surface from which the first conductive layer projects in a convex form, the first non-bonded surface being a partial area of a surface of the first insulating layer and containing the surface of the first insulating layer of a circumference of the first conductive layer,   a second interconnection layer including a second conductive layer and a second insulating layer, the second conductive layer being bonded to the surface of the first conductive layer and the second insulating layer being bonded to the surface of the first insulating layer excluding the first non-bonded surface.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the second interconnection layer includes a second non-bonded surface from which the second conductive layer projects in a convex form, the second non-bonded surface being a partial area of a surface of the second insulating layer and containing the surface of the second insulating layer of a circumference of the second conductive layer. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein a space is formed between the first non-bonded surface of the first interconnection layer and the surface of the second insulating layer of the second interconnection layer 
     
     
         4 . The semiconductor device according to  claim 3 , wherein the space is formed so as to be surrounded by a bonded portion of the surface of the first insulating layer excluding the first non-bonded surface and the surface of the second insulating layer. 
     
     
         5 . The semiconductor device according to  claim 3 , wherein a portion of a conductive material formed by the surface of the first conductive layer and the surface of the second conductive layer being bonded is arranged inside the space. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein the first conductive layer and the second conductive layer are bonded by a metallic bond and
 the first insulating layer and the second insulating layer are bonded by a covalent bond.

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