Molded insulator in package assembly
Abstract
Embodiments of the present disclosure describe techniques and configurations for package assembly including an embedded element and a molded insulator material. In some embodiments, an apparatus includes an electrical element (such as a die or a bridge interconnect structure) positioned on a surface of an insulator layer, a conductive pad positioned on the surface of the insulator layer and spaced apart from the electrical element, and a molded insulator material disposed on the surface of the insulator layer adjacent to the electrical element and on the conductive pad. Other embodiments may be described and/or claimed.
Claims
exact text as granted — not AI-modified1 - 6 . (canceled)
7 . An apparatus, comprising:
an electrical element with a first side and a second side opposite the first side, wherein the first side is inactive and coupled with an insulator layer; and a molded insulator material disposed on the surface of the insulator layer adjacent to the electrical element such that the molded insulator material is in contact with the insulator layer, and wherein the molded insulator material has a surface flush with the second side of the electrical element.
8 . The apparatus of claim 7 , further comprising a conductive pad positioned on the surface of the insulator layer and spaced apart from the electrical element.
9 . The apparatus of claim 8 , wherein the molded insulator material is further in contact with the conductive pad.
10 . The apparatus of claim 8 , further comprising:
a via extending through the molded insulator material to a surface of the conductive pad.
11 . The apparatus of claim 10 , wherein the via has a sloped profile consistent with being laser-drilled from the molded insulator material.
12 . The apparatus of claim 10 , further comprising a solder material disposed in the via in electrical contact with the conductive pad.
13 . The apparatus of claim 7 , wherein the electrical element is a bridge interconnect structure, the bridge interconnect structure to route electrical signals between a first die and a second die.
14 . The apparatus of claim 13 , wherein the bridge interconnect structure comprises silicon.
15 . The apparatus of claim 7 , wherein the insulator layer is a first insulator layer, and the apparatus further comprises:
a second insulator layer disposed on the molded insulator material and the electrical element.
16 . The apparatus of claim 15 , wherein the second insulator layer is an epoxy resin-based build-up film.
17 . The apparatus of claim 15 , wherein the electrical element further comprises a conductive pad, and the second insulator layer comprises a via extending through the second insulator layer to the conductive pad of the electrical element.
18 . The apparatus of claim 7 , wherein the molded insulator material is a resin, an epoxy or a plastic.
19 . The apparatus of claim 7 , wherein the molded insulator material is a thermally molded insulator material.
20 . The apparatus of claim 7 , wherein the electrical element is a die.
21 . A computing device, comprising:
a motherboard; and a chip coupled with the motherboard, wherein the chip includes:
an insulator layer having a surface;
a die positioned on the surface of the insulator layer, wherein the die has an inactive backside coupled to the surface of the insulator layer; and
a molded insulator material disposed on the surface of the insulator layer adjacent to the die such that the molded insulator material is in contact with the insulator layer, wherein the molded insulator material has a surface flush with a top surface of the die.
22 . The package assembly of claim 21 , wherein the chip is a processor or a communication chip.
23 . The package assembly of claim 21 , further comprising a via extending from a surface of the molded insulator material to a surface of a conductive pad that is coupled with the surface of the insulator layer and adjacent to the die, wherein the electrical interconnect comprises a conductive material disposed in the via.
24 . The package assembly of claim 23 , wherein the conductive material disposed in the via forms a conductive solder bump extending out of an opening of the via.
25 . The package assembly of claim 23 , further comprising a second insulator layer disposed on a surface of the molded insulator material.
26 . The package assembly of claim 21 , wherein a thickness of the molded insulator material is less than 30 microns, the thickness being in a direction that is perpendicular to the surface of the insulator layer.Join the waitlist — get patent alerts
Track US2016336258A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.