2d self-aligned via first process flow
Abstract
A method of forming 2D self-aligned vias before forming a subsequent metal layer and reducing capacitance of the resulting device and the resulting device are provided. Embodiments include forming dummy metal lines in a SiOC layer and extending in a first direction; replacing the dummy metal lines with metal lines, each metal line having a nitride cap; forming a softmask stack over the nitride cap and the SiOC layer; patterning a plurality of vias through the softmask stack down to the metal lines, the plurality of vias self-aligned along a second direction; removing the softmask stack; forming second dummy metal lines over the metal lines and extending in the second direction; forming a second SiOC layer between the dummy second metal lines on the SiOC layer; and replacing the dummy second metal lines with second metal lines, the second metal lines electrically connected to the metal lines through a via.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A device comprising:
a silicon substrate; an oxide layer formed over the substrate; a first silicon oxycarbide (SiOC) layer formed over the oxide layer; parallel first metal lines recessed in the first SiOC layer and extending in a first direction; an array of nitride caps and vias over the first metal lines, formed in the recessed first SiOC; parallel second metal lines extending in a second direction perpendicular to the first direction, the second metal lines being formed over the nitride caps, the vias, and the first SiOC layer; and a second SiOC between the second metal lines, down to the first SiOC and the first metal lines.
2 . The device according to claim 1 , wherein the nitride caps are formed to a thickness of 15 nanometer (nm) to 40 nm.
3 . The device according to claim 1 , wherein the plurality of vias are resized by the formation of the second metal lines.
4 . The device according to claim 3 , wherein the plurality of vias are self-aligned in both the first and the second directions.
5 . The device according to claim 1 , wherein the first and second metal lines comprise tungsten (W), cobalt (Co), or copper (Cu).
6 . The device according to claim 1 , wherein the first metal lines have a width of 10 nm to 35 nm and a height of 30 nm to 120 nm, inclusive of the nitride cap.
7 . A device comprising:
parallel first metal lines formed in a first silicon oxycarbide (SiOC) layer and extending in a first direction, each first metal line having a nitride cap; a plurality of vias extending down to the first metal lines, the plurality vias extending along a second direction; parallel second metal lines formed in a second SiOC layer over the first metal lines and extending in the second direction perpendicular to the first direction, the second metal lines electrically connected to the first metal lines through at least one of the vias.
8 . The device according to claim 7 , wherein each second metal line has a nitride cap.
9 . The device according to claim 7 , nitride caps are formed to a thickness of 15 nanometer (nm) to 40 nm.
10 . The device according to claim 7 , wherein the plurality of vias are resized by the formation of the second metal lines.
11 . The device according to claim 10 , wherein the plurality of vias are self-aligned in both the first and the second directions.
12 . The device according to claim 7 , wherein the first and second metal lines comprise tungsten (W), cobalt (Co), or copper (Cu).
13 . The device according to claim 7 , wherein the first metal lines have a width of 10 nm to 35 nm and a height of 30 nm to 120 nm, inclusive of the nitride cap.
14 . The device according to claim 7 , wherein the first SiOC is formed over an oxide layer.
15 . The device according to claim 14 , wherein the oxide layer is formed over a silicon substrate.
16 . A device comprising:
a silicon substrate; an oxide layer formed over the substrate; a first silicon oxycarbide (SiOC) layer formed over the oxide layer; parallel first metal lines recessed in the first SiOC layer and extending in a first direction, the first metal lines comprising tungsten (W), cobalt (Co), or copper (Cu); an first array of nitride caps and vias over the first metal lines, formed in the recessed first SiOC; parallel second metal lines extending in a second direction perpendicular to the first direction, the second metal lines being formed over the nitride caps, the vias, and the first SiOC layer, and the second metal lines comprising W, Co or Cu; an second array of nitride caps formed over the second metal lines; and a second SiOC between the second metal lines, down to the first SiOC and the first metal lines.
17 . The device according to claim 16 , wherein the first metal lines have a width of 10 nm to 35 nm and a height of 30 nm to 120 nm, inclusive of the nitride cap.
18 . The device according to claim 16 , wherein the first and second arrays of nitride caps are formed to a thickness of 15 nanometer (nm) to 40 nm.
19 . The device according to claim 16 , wherein the plurality of vias are resized by the formation of the second metal lines.
20 . The device according to claim 19 , wherein the plurality of vias are self-aligned in both the first and the second directions.Join the waitlist — get patent alerts
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