Self-forming, self-aligned barriers for back-end interconnects and methods of making same

Abstract

Processes of forming an insulated wire into an interlayer dielectric layer (ILD) of a back-end metallization includes thermally treating a metallic barrier precursor under conditions to cause at least one alloying element in the barrier precursor to form a dielectric barrier between the wire and the ILD. The dielectric barrier is therefore a self-forming, self-aligned barrier. Thermal processing is done under conditions to cause the at least one alloying element to migrate from a zone of higher concentration thereof to a zone of lower concentration thereof to further form the dielectric barrier. Various apparatus are made by the process.

What is claimed is: 
     
         1 . An apparatus comprising:
 an interlayer dielectric (ILD) layer on a substrate and having a recess therein;   a metal conductor provided in the recess;   a liner between the metal conductor and the ILD layer, the liner including tantalum;   a top layer on a top surface of the metal conductor, the top layer including manganese or cobalt.   
     
     
         2 . The apparatus of  claim 1 , further comprising a dielectric film on the ILD layer adjacent to the top layer and on the top layer. 
     
     
         3 . The apparatus of  claim 2 , wherein the dielectric film is in contact with the ILD layer adjacent to the top layer. 
     
     
         4 . The apparatus of  claim 2 , wherein the dielectric film is substantially the same chemistry as the ILD layer. 
     
     
         5 . The apparatus of  claim 1 , wherein the liner and the top layer form a barrier structure that contacts and encloses a bottom surface, the top surface, and side surfaces of the metal conductor. 
     
     
         6 . The apparatus of  claim 1 , further comprising a composite dielectric layer on the ILD layer and the top layer, wherein the composite dielectric includes:
 a first dielectric film on the ILD layer and the top layer;   a second dielectric film on the first dielectric film, wherein the second dielectric film is denser that the first dielectric film; and   a subsequent dielectric film on the second dielectric film.   
     
     
         7 . The apparatus of  claim 6 , wherein the second dielectric film is denser that the first dielectric film by a factor in a range from 1.01 to 2. 
     
     
         8 . The apparatus of  claim 1 , wherein the liner is in contact with a bottom surface and side surfaces of the metal conductor. 
     
     
         9 . The apparatus of  claim 1 , wherein the metal conductor is formed of copper, and wherein the top layer further includes silicon. 
     
     
         10 . A method for forming a back-end metallization, the method comprising:
 forming a recess in an interlayer dielectric (ILD) layer;   forming a liner in the recess, the liner including tantalum;   forming a precursor material in the recess on the liner, the precursor material including a metal and manganese or cobalt;   forming a metal conductor in the recess on the precursor material; and   thermally treating the precursor material to cause manganese or cobalt of the precursor material to migrate to a top surface of the conductor to form a top layer on the top surface of the conductor, wherein the top layer includes manganese or cobalt.   
     
     
         11 . The method of  claim 10 , further comprising forming a dielectric film on the ILD layer and the metal conductor, wherein the dielectric film includes silicon, and wherein the thermally treating the precursor material causes the manganese of the precursor material to migrate to a region of the dielectric film on the top surface of the conductor to convert the region of the dielectric film to the top layer. 
     
     
         12 . The method of  claim 11 , wherein the dielectric film is substantially the same chemistry as the ILD layer. 
     
     
         13 . The method of  claim 11 , wherein the dielectric film is a first dielectric film, and wherein the method further comprises:
 forming a second dielectric film on the first dielectric film, wherein the second dielectric film is denser that the first dielectric film; and   forming a subsequent dielectric film on the second dielectric film.   
     
     
         14 . The method of  claim 13 , wherein the second dielectric film is denser that the first dielectric film by a factor in a range from 1.01 to 2. 
     
     
         15 . The method of  claim 10 , wherein the liner and the top layer form a continuous and closed barrier structure that encloses a bottom surface, the top surface, and side surfaces of the metal conductor. 
     
     
         16 . The method of  claim 10 , wherein the metal of the precursor material is the same as a metal of the metal conductor. 
     
     
         17 . A computing system comprising:
 a foundation substrate;   a memory coupled to the foundation substrate;   a processor coupled the foundation substrate, the processor including:
 an interlayer dielectric (ILD) layer on a substrate and having a recess therein; 
 a metal conductor in the recess; 
 a liner in the recess between the metal conductor and the ILD layer, the liner including tantalum; 
 a top layer on a top surface of the metal conductor, the top layer including manganese or cobalt, wherein the top layer and the liner form a continuous and closed barrier structure that encloses a bottom surface, the top surface, and side surfaces of the metal conductor; and 
 a dielectric film on the ILD layer adjacent to the top layer and on the top layer. 
   
     
     
         18 . The system of  claim 17 , wherein the dielectric film is in contact with the ILD layer adjacent to the top layer. 
     
     
         19 . The system of  claim 17 , wherein the dielectric film is substantially the same chemistry as the ILD layer. 
     
     
         20 . The system of  claim 17 , wherein the dielectric film is a first dielectric film, and wherein the processor further includes:
 a second dielectric film disposed on the first dielectric film; and   a subsequent dielectric film disposed on the second dielectric film, wherein the second dielectric film is denser that the first dielectric film and the subsequent dielectric film.   
     
     
         21 . The system of  claim 17 , wherein the second dielectric film is denser than the first dielectric film and the subsequent dielectric film by a factor in a range from 1.01 to 2. 
     
     
         22 . The system of  claim 17 , wherein the liner is in contact with the bottom surface and side surfaces of the metal conductor. 
     
     
         23 . The system of  claim 17 , further comprising a display device coupled to the foundation substrate. 
     
     
         24 . The system of  claim 17 , wherein the processor is a system-on-chip (SoC), that includes an on-die memory, a processing circuit, and a communications circuit. 
     
     
         25 . The system of  claim 17 , wherein the system is a mobile wireless communication device.