Method of Manufacturing a Semiconductor Device with a Polysilicon-Filled Trench

Abstract

A method of manufacturing a semiconductor device includes forming a trench in a semiconductor body at a first surface of the semiconductor body, forming a polysilicon material in the trench, introducing dopants into the polysilicon material by a high dose and low energy process, and performing a thermal treatment configured to drive-in the dopants into the polysilicon material.

What is claimed is: 
     
         1 . A method of manufacturing a semiconductor device, the method comprising:
 forming a trench in a semiconductor body at a first surface of the semiconductor body;   forming a polysilicon material in the trench;   introducing dopants into the polysilicon material by a high dose and low energy process; and   performing a thermal treatment configured to drive-in the dopants into the polysilicon material.   
     
     
         2 . The method of  claim 1 , wherein the high dose and low energy process is an ion shower implantation or a plasma deposition. 
     
     
         3 . The method of  claim 1 , wherein the dopants are introduced at a dose in a range between 5×10 16  cm −2  and 5×10 17  cm −2 . 
     
     
         4 . The method of  claim 1 , wherein the dopants are introduced at an implant voltage in a range of 0.1 kV to 30 kV. 
     
     
         5 . The method of  claim 1 , wherein one or both of phosphorus and boron are introduced as the dopants. 
     
     
         6 . The method of  claim 1 , further comprising forming a gate dielectric in the trench prior to forming the polysilicon material in the trench. 
     
     
         7 . The method of  claim 6 , further comprising forming a dielectric structure and a field electrode in the trench prior to forming a gate dielectric in the trench. 
     
     
         8 . The method of  claim 1 , wherein, prior to introducing dopants into the polysilicon material by the high dose and low energy process, the polysilicon material is formed as a undoped or lightly doped polysilicon material. 
     
     
         9 . The method of  claim 1 , wherein the polysilicon material is formed as a conformal polysilicon layer including a sidewall part and a bottom part. 
     
     
         10 . The method of  claim 9 , wherein the thermal treatment leads to drive-in of the dopants from the bottom part of the conformal polysilicon layer to the sidewall part, and results in a lower doping concentration of the conformal polysilicon layer in the sidewall part than in the bottom part. 
     
     
         11 . The method of  claim 1 , wherein forming the polysilicon material in the trench comprises filling the trench with the polysilicon material. 
     
     
         12 . The method of  claim 11 , wherein the thermal treatment leads to drive-in of the dopants from a top part of the polysilicon material to a medium part of the polysilicon material, and results in a lower doping concentration of the polysilicon material in the medium part than in the top part. 
     
     
         13 . The method of  claim 1 , wherein the polysilicon material is part of one or more of a gate structure, a zener diode, a diode, and a temperature sensor. 
     
     
         14 . A semiconductor device, comprising:
 a trench in a semiconductor body at a first surface of the semiconductor body;   a polysilicon material filling the trench up to the first surface; and   dopants in the polysilicon material,   wherein a dose of the dopants is in a range between 5×10 16  cm −2  and 5×10 17  cm −2 ,   wherein a doping concentration of the polysilicon material is lower in a medium part of the polysilicon material than in a top part of the polysilicon material.   
     
     
         15 . The semiconductor device of  claim 14 , wherein the polysilicon material is part of one or more of a gate structure, a zener diode, a diode, and a temperature sensor. 
     
     
         16 . The semiconductor device of  claim 14 , wherein the polysilicon material is a gate electrode, the semiconductor device further comprising a gate dielectric in the trench, a field electrode in the trench, and a dielectric structure in the trench electrically insulating the gate electrode and the field electrode. 
     
     
         17 . A semiconductor device, comprising:
 a trench in a semiconductor body at a first surface of the semiconductor body;   a conformal polysilicon layer in the trench, the conformal polysilicon layer including a sidewall part and a bottom part; and   dopants in the conformal polysilicon layer,   wherein a dose of the dopants is in a range between 5×10 16  cm −2  and 5×10 17  cm −2 ,   wherein a doping concentration of the conformal polysilicon layer is lower in the sidewall part than in the bottom part.   
     
     
         18 . The semiconductor device of  claim 17 , wherein the conformal polysilicon layer is part of one or more of a gate structure, a zener diode, a diode, and a temperature sensor. 
     
     
         19 . The semiconductor device of  claim 17 , wherein the conformal polysilicon layer is a gate electrode, the semiconductor device further comprising a gate dielectric in the trench, a field electrode in the trench, and a dielectric structure in the trench electrically insulating the gate electrode and the field electrode.