Method for fabricating electronic devices having semiconductor memory unit

Abstract

Devices and methods based on disclosed technology include, among others, an electronic device including silicide layers capable of effectively reducing contact resistance in the electronic device including buried gates and a method for fabricating the electronic device. Specifically, an electronic device in one implementation includes a plurality of buried gates formed in a substrate and silicide layers formed over the substrate between the buried gates and protruding upwardly from the buried gates.

1 . A method for fabricating an electronic device having a semiconductor memory unit, comprising:
 forming a plurality of trenches in a substrate;   forming conductive layers, each burying part of the trench;   forming sealing layers, each burying the remaining trench;   forming silicide layers above the substrate to be located between the sealing layers and to protrude above the sealing layers.   
     
     
         2 . The method of  claim 1 , wherein the forming of the silicide layers comprises:
 recessing the sealing layers to form protruded portions in the substrate above the recessed sealing layers;   forming a metal-containing layer to cover the protruded portions;   performing annealing of the metal-containing layer to form the silicide layers; and   removing the metal-containing layer that has not reacted after the annealing.   
     
     
         3 . The method of  claim 1 , further comprising:
 forming impurity regions in the substrate between the sealing layers by implanting ion impurities into the substrate; and   forming contact plugs to be in contact with the silicide layers.   
     
     
         4 . The method of  claim 3 , wherein the conductive layer comprises a gate electrode and the impurity regions comprise a source and drain regions. 
     
     
         5 - 16 . (canceled) 
     
     
         17 . A method for fabricating an electronic device having a semiconductor memory unit, comprising:
 forming a plurality of buried gates in a substrate having a plurality of active regions defined by isolation layers, each buried gates including trenches, gate electrodes and sealing layers;   forming impurity regions in the active regions between the buried gates by implanting ion impurities to the substrate; and   forming silicide layers on the impurity regions and between the buried gates to provide an increased contact area between the substrate and contact holes.   
     
     
         18 . The method of  claim 17 , wherein the forming silicide layers includes:
 forming protruding parts on the impurity regions between the buried gates by etching the isolation layers and the sealing layers   forming a metal-containing layer on the surface of the substrate to cover the protruding part;   reacting the protruding parts with the metal-containing layer to form silicide layers.   
     
     
         19 . The method of  claim 17 , further comprising:
 forming an interlayer insulating layer; and   forming contact plugs to be in contact with the silicide layers through the interlayer insulating layer.   
     
     
         20 . The method of  claim 18 , further comprising:
 performing an etching the protruding parts to control shapes of the protruding parts.   
     
     
         21 . The method of  claim 20 , wherein the performing of the etching is controlled such that the surface of the isolation layers and the surface of the sealing layers are placed on the same planed while the gate electrodes are not exposed when the etching is completed.